Fast source-level data assignment to dual memory banks

Due to their streaming nature memory bandwidth is critical for most digital signal processing applications. To accommodate for these bandwidth requirements digital signal processors are typically equipped with dual memory banks that enable simultaneous access to two operands if the data is partitioned appropriately. Fully automated and compiler integrated approaches to data partitioning and memory bank assignment, however, have found little acceptance by DSP software developers. This is partly due to their inflexibility and inability to cope with certain manual data pre-assignments, e.g. due to I/O constraints. In this paper we present a different and more flexible approach, namely source-level dual memory assignment where code generation targets DSP-C, a standardised C language extension widely supported by industrial C compilers for DSPs. Additionally, we present a novel partitioning algorithm based on soft colouring that is more efficient and scalable than the currently known best integer linear programming algorithm, whilst achieving competitive code quality. We have evaluated our scheme on an Analog Devices TigerSHARC DSP and achieved speedups of up to 1.57 on 13 UTDSP benchmarks.

[1]  G. Webbe,et al.  Any Questions , 1946, The Indian medical gazette.

[2]  Steven W. K. Tjiang,et al.  SUIF: an infrastructure for research on parallelizing and optimizing compilers , 1994, SIGP.

[3]  Stephen Fitzpatrick,et al.  An Experimental Assessment of a Stochastic, Anytime, Decentralized, Soft Colourer for Sparse Graphs , 2001, SAGA.

[4]  Shuvra S. Bhattacharyya,et al.  Data Partit ioning for DSP Software Synthesis , 2003 .

[5]  Rainer Leupers,et al.  Variable partitioning for dual memory bank DSPs , 2001, 2001 IEEE International Conference on Acoustics, Speech, and Signal Processing. Proceedings (Cat. No.01CH37221).

[6]  Gary William Grewal,et al.  An EGA approach to the compile-time assignment of data to multiple memories in digital-signal processors , 2003, CARN.

[7]  Rainer Leupers,et al.  Software synthesis and code generation for signal processing systems , 2000 .

[8]  Stelian Coros,et al.  A MULTI-OBJECTIVE INTEGER LINEAR PROGRAM FOR MEMORY ASSIGNMENT IN THE DSP DOMAIN , 2006 .

[9]  P. Koch,et al.  An evaluation of compiler-processor interaction for DSP applications , 2000, Conference Record of the Thirty-Fourth Asilomar Conference on Signals, Systems and Computers (Cat. No.00CH37154).

[10]  Viera Sipková,et al.  Efficient Variable Allocation to Dual Memory Banks of DSPs , 2003, SCOPES.

[11]  Jochen A. G. Jess,et al.  Conflict Modelling and Instruction Scheduling in Code Generation for In-House DSP Cores , 1995, 32nd Design Automation Conference.

[12]  Shuvra S. Bhattacharyya,et al.  Partitioning for DSP Software Synthesis , 2003, SCOPES.

[13]  Paul Chow,et al.  Exploiting dual data-memory banks in digital signal processors , 1996, ASPLOS VII.

[14]  Rainer Leupers Novel Code Optimization Techniques for DSPs , 1998 .

[15]  Martin C. Rinard,et al.  Pointer analysis for multithreaded programs , 1999, PLDI '99.