The paper uses FPGA to build the 64kb/s time slot business all digital cross method to simulate the function of the existing time slot cross chip, through setting up with the external CPU communication interface to make cross configuration more flexible. It uses the method of data buffer storage and ping pong operation to ensure the seamless data, and the exchange of data is more convenient and easy to operate. After the measurement of the hardware circuit, the correctness of the design is verified.