Beyond-Silicon Devices: Considerations for Circuits and Architectures

While the relentless scaling of silicon-based field-effect transistors (FETs) has improved digital system performance for decades, the benefits moving forward are suffering from diminishing returns. How then can digital computing systems meet future energy efficiency requirements, for example, for future Internet-of-Everything (IoE) and abundant-data applications? To answer this outstanding question, a wide range of emerging nanotechnologies are currently being explored to replace silicon as the channel material for future transistors. In particular, carbon nanotube (CNT) FETs (CNFETs) are a highly promising candidate to continue to improve energy efficiency of digital VLSI circuits, as high-performance/energy-efficient CNFETs have been experimentally demonstrated, and larger-scale CNFET circuits and systems integrating millions of CNFETs have been experimentally demonstrated as well. In this chapter, we discuss the benefits of CNFET for VLSI circuits, and describe combined processing and design techniques to transform CNTs from a promising technology into highly energy-efficient digital circuits. Furthermore, CNFETs offer a unique opportunity to realize entirely new three-dimensional (3D) computing architectures, in which multiple layers of CNFET circuits can be densely integrated on top of each other over the same starting substrate, along with layers of memory, truly embodying computation immersed in memory. We provide an overview of the resulting 3D systems, that is, 3D nanosystems, and demonstrate that they offer EDP benefits in the range of 1000× for next-generation abundant-data applications.

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