Analog VLSI implementation for stereo correspondence between 2-D images

Many robotics and navigation systems utilizing stereopsis to determine depth have rigid size and power constraints and require direct physical implementation of the stereo algorithm. The main challenges lie in managing the communication between image sensor and image processor arrays, and in parallelizing the computation to determine stereo correspondence between image pixels in real-time. This paper describes the first comprehensive system level demonstration of a dedicated low-power analog VLSI (very large scale integration) architecture for stereo correspondence suitable for real-time implementation. The inputs to the implemented chip are the ordered pixels from a stereo image pair, and the output is a two-dimensional disparity map. The approach combines biologically inspired silicon modeling with the necessary interfacing options for a complete practical solution that can be built with currently available technology in a compact package. Furthermore, the strategy employed considers multiple factors that may degrade performance, including the spatial correlations in images and the inherent accuracy limitations of analog hardware, and augments the design with countermeasures.

[1]  James J. Little,et al.  Interaction of algorithm and implementation for analog VLSI stereo vision , 1991, Defense, Security, and Sensing.

[2]  Takeo Kanade,et al.  Integrated sensor and range-finding analog signal processor , 1991 .

[3]  Tobi Delbrück,et al.  Cooperative Stereo Matching Using Static and Dynamic Image Features , 1989, Analog VLSI Implementation of Neural Systems.

[4]  Tobi Delbriick.  "Bump" Circuits for Computing Similarity and Dissimilarity of Analog Voltages , 1991 .

[5]  Jitendra Malik,et al.  Computational framework for determining stereo correspondence from a set of linear spatial filters , 1992, Image Vis. Comput..

[6]  John Lazzaro,et al.  Winner-Take-All Networks of O(N) Complexity , 1988, NIPS.

[7]  Rodney M. Goodman,et al.  A real-time neural system for color constancy , 1991, IEEE Trans. Neural Networks.

[8]  T. Delbruck.  'Bump' circuits for computing similarity and dissimilarity of analog voltages , 1991, IJCNN-91-Seattle International Joint Conference on Neural Networks.

[9]  I. N. Parker.  VLSI architecture , 1986 .

[10]  Timothy A. Grogan,et al.  Depth From Stereo: Variational Theory And A Hybrid Analog-Digital Network , 1989, Photonics West - Lasers and Applications in Science and Engineering.

[11]  Massimo A. Sivilotti,et al.  Real-time visual computations using analog CMOS processing arrays , 1987 .

[12]  Jin Luo,et al.  Computing motion using analog and binary resistive networks , 1988, Computer.

[13]  K. W. Current,et al.  A unified DCT/IDCT architecture for VLSI implementation , 1988, ICASSP-88., International Conference on Acoustics, Speech, and Signal Processing.

[14]  Takeo Kanade,et al.  Integrated sensor and rangefinding analog signal processor , 1990, IEEE Proceedings of the Custom Integrated Circuits Conference.

[15]  Gamze Erten Salam.  An analog VLSI architecture for stereo correspondence , 1994 .

[16]  Carver Mead,et al.  Analog VLSI and neural systems , 1989 .