论文信息 - A fast CAM-based Watermarking extraction on FPGA

A fast CAM-based Watermarking extraction on FPGA

A CAM-based (Content Addressable Memory) system for fast Watermarking extraction has been proposed and implemented on hardware system using FPGA device. The system has a simple structure, does not employ any Central Processor Units (CPUs) or complicated algorithms for extracting hidden information. The authors take advantages of CAM which has an ability of parallel multi-match mode for designing the system. This increases the decryption performance of the Watermarking extraction system. The fast proposed system is applied to fast Watermarking extraction on 2-dimension (2-D) data.

[1] Gregory W. Wornell,et al. Quantization Index Modulation Methods for Digital Watermarking and Information Embedding of Multimedia , 2001, J. VLSI Signal Process..

[2] Saraju P. Mohanty,et al. FPGA Based Implementation of an Invisible-Robust Image Watermarking Encoder , 2004, CIT.

[3] Saraju P. Mohanty,et al. A VLSI architecture for visible watermarking in a secure still digital camera (S/sup 2/DC) design (Corrected)* , 2005, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[4] S. Mohanty,et al. A VLSI Architecture for Visible Watermarking in a Secure Still Digital Camera ( S 2 DC ) Design , 2005 .

[5] Rajesh Kannan Megalingam,et al. Hardware Implementation of Low Power, High Speed DCT/IDCT Based Digital Image Watermarking , 2009, 2009 International Conference on Computer Technology and Development.

[6] A Mohamed Zuhair,et al. Fpga Based Image Security And Authentication In Digital , 2010 .

[7] Katsumi Inoue,et al. A novel CAM-based Information Detection Hardware System on FPGA , 2012 .