Ispike: A post-link optimizer for the intel architecture

[1]  Daniel M. Lavery,et al.  Optimizations to prevent cache penalties for the Intel/spl reg/ Itanium/spl reg/ 2 processor , 2003, International Symposium on Code Generation and Optimization, 2003. CGO 2003..

[2]  Gadi Haber,et al.  Optimization opportunities created by global data reordering , 2003, International Symposium on Code Generation and Optimization, 2003. CGO 2003..

[3]  Jean-Francois Collard,et al.  Optimizations to prevent cache penalties for the Intel® Itanium® 2 Processor , 2003, CGO.

[4]  Harish Patil,et al.  Profile-guided post-link stride prefetching , 2002, ICS '02.

[5]  Youfeng Wu,et al.  Efficient discovery of regular stride patterns in irregular programs and its use in compiler prefetching , 2002, PLDI '02.

[6]  Amitabh Srivastava,et al.  Vulcan Binary transformation in a distributed environment , 2001 .

[7]  S. Watterson,et al.  alto: a link‐time optimizer for the Compaq Alpha , 2001, Softw. Pract. Exp..

[8]  Todd C. Mowry,et al.  Cooperative prefetching: compiler and hardware support for effective instruction prefetching in modern processors , 1998, Proceedings. 31st Annual ACM/IEEE International Symposium on Microarchitecture.

[9]  Robert S. Cohn,et al.  Optimizing Alpha Executables on Windows NT with Spike , 1998, Digit. Tech. J..

[10]  Zheng Wang,et al.  System support for automatic profiling and optimization , 1997, SOSP.

[11]  Alec Wolman,et al.  Instrumentation and optimization of Win32/intel executables using Etch , 1997 .

[12]  David W. Goodwin,et al.  Interprocedural dataflow analysis in an executable optimizer , 1997, PLDI '97.

[13]  Anoop Gupta,et al.  Design and evaluation of a compiler algorithm for prefetching , 1992, ASPLOS V.

[14]  Robert Hundt,et al.  Dynamic Binary Instrumentation on IA-64 , 2001 .

[15]  Rakesh Krishnaiyer,et al.  An Overview of the Intel® IA-64 Compiler , 1999 .