Common subexpression elimination involving multiple variables linear DSP synthesis

Common subexpression elimination is commonly employed to reduce the number of operations in DSP algorithms after decomposing constant multiplications into shifts and additions. Conventional optimization techniques for finding common subexpressions can optimize constant multiplications with only a single variable at a time, and hence cannot fully optimize the computations with multiple variables found in matrix form of linear systems like DCT, DFT etc. We transform these computations such that all common subexpressions involving any number of variables can be detected. We then present heuristic algorithms to select the best set of common subexpressions. Experimental results show the superiority of our technique over conventional techniques for common subexpression elimination.

[1]  Miodrag Potkonjak,et al.  Multiple constant multiplications: efficient and versatile framework and algorithms for exploring common subexpression elimination , 1996, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[2]  Keshab K. Parhi,et al.  VLSI digital signal processing systems , 1999 .

[3]  Patrick Schaumont,et al.  A new algorithm for elimination of common subexpressions , 1999, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[4]  R. Hartley Subexpression sharing in filters using canonic signed digit multipliers , 1996 .

[5]  Alberto Sangiovanni-Vincentelli,et al.  Logic synthesis for vlsi design , 1989 .

[6]  G. Venkatesh,et al.  Synthesis of multiplier-less FIR filters with minimum number of additions , 1995, Proceedings of IEEE International Conference on Computer Aided Design (ICCAD).

[7]  In-Cheol Park,et al.  Digital filter synthesis based on an algorithm to generate all minimal signed digit representations , 2002, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[8]  Robert K. Brayton,et al.  MIS: A Multiple-Level Logic Optimization System , 1987, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[9]  Majid Ahmadi,et al.  A New Algorithm for the Elimination of Common Subexpressions in Hardware Implementation of Digital Filters by Using Genetic Programming , 2002, J. VLSI Signal Process..

[10]  H. T. Nguyen,et al.  Number-splitting with shift-and-add decomposition for power and hardware optimization in linear DSP synthesis , 2000, IEEE Trans. Very Large Scale Integr. Syst..