A Cellular Approach for the Implementation of Digital Signal Processing Algorithms

In this paper a unified cellular circuit approach is presented for the implementation of digital filters and of the Fast Fourier Transform (FFT). Specifically, the second order section and the butterfly computation of the FFT are realized by using two’s complement serial arithmetic in conjuction with the pipeline technique. The proposed method yields a cascade cellular structure with small circuit complexity and well suited for LSI realization. Finally, this cellular approach is functionally complete, that is, in addition to the arithmetic operations, it also provides the filter delays and the rounding.