Modeling and measurements of parasitic parameters for integrated power electronics modules

In this paper, the parasitic inductance and capacitance of integrated power electronics modules (IPEMs) were modeled using Maxwell Q3D extractor. The IPEMs were then measured using impedance analyzer. A set of impedance curves was obtained under different measurement conditions, such as different DC bias voltages. Together with the device model, the Maxwell Q3D extractor results were simulated in Saber to get the impedance curves, which were compared with impedance measurement results. The comparison showed good agreement between simulation and measurement results.

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