Electromigration for microarchitects

Degradation of devices has become a major issue for processor design due to continuous device shrinkage and current density increase. Transistors and wires suffer high stress, and failures may appear in the field. In particular, wires degrade mainly due to electromigration when driving current. Techniques to mitigate electromigration to some extent have been proposed from the circuit point of view, but much effort is still required from the microarchitecture side to enable wire scaling in future technologies. This survey brings to the microarchitecture community a comprehensive study of the causes and implications of electromigration in digital circuits and describes the challenges that must be faced to mitigate electromigration by means of microarchitectural solutions.

[1]  David Overhauser,et al.  Full-chip verification methods for DSM power distribution systems , 1998, Proceedings 1998 Design and Automation Conference. 35th DAC. (Cat. No.98CH36175).

[2]  Chenming Hu,et al.  Projecting interconnect electromigration lifetime for arbitrary current waveforms , 1990 .

[3]  A. Scorzoni,et al.  Electromigration in thin-film interconnection lines: models, methods and results , 1991 .

[4]  Jens Lienig,et al.  introduction to electromigration-aware physical design , 2006, ISPD '06.

[5]  Klaus Wetzig,et al.  Study of electromigration damage in Al interconnect lines inside a SEM , 2000 .

[6]  J. Black Electromigration failure modes in aluminum metallization for semiconductor devices , 1969 .

[7]  Pradip Bose,et al.  A Framework for Architecture-Level Lifetime Reliability Modeling , 2007, 37th Annual IEEE/IFIP International Conference on Dependable Systems and Networks (DSN'07).

[8]  Jens Lienig,et al.  Electromigration-aware physical design of integrated circuits , 2005, 18th International Conference on VLSI Design held jointly with 4th International Conference on Embedded Systems Design.

[9]  Kaustav Banerjee,et al.  Scaling Analysis of On-Chip Power Grid Voltage Variations in Nanometer Scale ULSI , 2005, Analog Integrated Circuits and Signal Processing.

[10]  F. d'Heurle Electromigration and failure in electronics: An introduction , 1971 .

[11]  Ramesh Karri,et al.  Electromigration reliability enhancement via bus activity distribution , 1996, DAC '96.

[12]  E. M. Atakov,et al.  Effect of VLSI interconnect layout on electromigration performance , 1998, 1998 IEEE International Reliability Physics Symposium Proceedings. 36th Annual (Cat. No.98CH36173).

[13]  I. Blech Electromigration in thin aluminum films on titanium nitride , 1976 .

[14]  A. B UERKE Study of Electromigration Damage in Al Interconnect Lines inside a Sem , 2000 .

[15]  Jiang Tao,et al.  Modeling and characterization of electromigration failures under bidirectional current stress , 1996 .

[16]  Sani R. Nassif,et al.  A methodology for the simultaneous design of supply and signal networks , 2004, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[17]  Pradip Bose,et al.  The case for lifetime reliability-aware microprocessors , 2004, Proceedings. 31st Annual International Symposium on Computer Architecture, 2004..

[18]  共立出版株式会社 コンピュータ・サイエンス : ACM computing surveys , 1978 .

[19]  Cora Salm,et al.  Modelling of the reservoir effect on electromigration lifetime , 2001, Proceedings of the 2001 8th International Symposium on the Physical and Failure Analysis of Integrated Circuits. IPFA 2001 (Cat. No.01TH8548).

[20]  S. Balaji,et al.  Fault tolerant bus architecture for deep submicron based processors , 2005, CARN.

[21]  Sarita V. Adve,et al.  The impact of technology scaling on lifetime reliability , 2004, International Conference on Dependable Systems and Networks, 2004.

[22]  Malgorzata Marek-Sadowska,et al.  On-chip power-supply network optimization using multigrid-based technique , 2005, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[23]  Kai Wang,et al.  On-chip power supply network optimization using multigrid-based technique , 2003, Proceedings 2003. Design Automation Conference (IEEE Cat. No.03CH37451).

[24]  Fausto Fantini,et al.  Activation energy in the early stage of electromigration in Al-1% Si/TiN/Ti bamboo lines , 1995 .

[25]  J. Maiz Characterization of electromigration under bidirectional (BC) and pulsed unidirectional (PDC) currents , 1989 .

[26]  Donald M. Chiarulli,et al.  Area, power, and pin efficient bus transceiver using multi-bit-differential signaling , 2005, 2005 IEEE International Symposium on Circuits and Systems.

[27]  E. S. Meieran,et al.  DIRECT TRANSMISSION ELECTRON MICROSCOPE OBSERVATION OF ELECTROTRANSPORT IN ALUMINUM THIN FILMS , 1967 .

[28]  Analysis of Blech product threshold in passivated AlCu interconnections , 1998, Proceedings of the IEEE 1998 International Interconnect Technology Conference (Cat. No.98EX102).

[29]  Yici Cai,et al.  Relaxed hierarchical power/ground grid analysis , 2005, Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005..