Timed behavioural modelling and affine scheduling of embedded software architectures in the AADL using Polychrony

High-level modelling languages and standards, such as Simulink, UML, SysML, MARTE and AADL (Architecture Analysis & Design Language), meet increasing adoption in the design of embedded systems in order to carry out system-level analysis, verification and validation (V&V) and architecture exploration, as early as possible. These analysis, V&V, architecture exploration techniques rely on mathematical foundations and formal methods in order to avoid semantics ambiguities in the design of safety-critical systems.In order to support integration validation, it is necessary to define a formal framework of virtual prototyping to integrate, verify, exercise and analyse the application code generated by modelling tools as early as possible and virtually integrate it with simulators of third-party middleware and hardware. Such a virtual prototyping platform makes it possible to validate the expected behaviour of the final application software and check that the resulting system indeed meets the specified performance requirements before the actual hardware even actually exists.In this paper, we present the definition, development and case-study validation of such a comprehensive framework, based on the synchronous paradigm and the polychronous model of computation and communication of its supportive open-source toolset: Polychrony. A longer-term aim of our work is to equip the AADL standard with an architecture-centric framework allowing for synchronous modelling, verification and synthesis of embedded software. Virtual prototyping of AADL architectures in a synchronous model of computation.Synchronous framework for modelling and verification of AADL specifications.Definition, development and case-study validation of an AADL simulation framework.Efficient affine abstraction and schedule synthesis from AADL timing constraints.

[1]  Dianfu Ma,et al.  Two Formal Semantics of a Subset of the AADL , 2011, 2011 16th IEEE International Conference on Engineering of Complex Computer Systems.

[2]  Peter Csaba Ölveczky,et al.  Formal Semantics and Analysis of Behavioral AADL Models in Real-Time Maude , 2010, FMOODS/FORTE.

[3]  Edward A. Lee,et al.  Ptolemy: A Framework for Simulating and Prototyping Heterogenous Systems , 2001, Int. J. Comput. Simul..

[4]  Paul Le Guernic,et al.  Affine Transformations in SIGNAL and Their Application in the Specification and Validation of Real-Time Systems , 1997, ARTS.

[5]  Thierry Gautier,et al.  System synthesis from AADL using Polychrony , 2011, 2011 Electronic System Level Synthesis Conference (ESLsyn).

[6]  Joseph Sifakis,et al.  Translating AADL into BIP - Application to the Verification of Real-Time Systems , 2009, MoDELS.

[7]  Paul Le Guernic,et al.  Compilation of Polychronous Data Flow Equations , 2010, Synthesis of Embedded Software.

[8]  Joost-Pieter Katoen,et al.  Safety, Dependability and Performance Analysis of Extended AADL Models , 2011, Comput. J..

[9]  Jean-Pierre Talpin,et al.  Buffer minimization in earliest-deadline first scheduling of dataflow graphs , 2013, LCTES '13.

[10]  Aloysius K. Mok,et al.  Improvement in feasibility testing for real-time tasks , 1996, Real-Time Systems.

[11]  Alan Burns,et al.  Schedulability Analysis for Real-Time Systems with EDF Scheduling , 2009, IEEE Transactions on Computers.

[12]  Jean-Christophe Le Lann,et al.  POLYCHRONY for System Design , 2003, J. Circuits Syst. Comput..

[13]  Adnan Bouakaz.  Real-time scheduling of dataflow graphs , 2013 .

[14]  Gilles Kahn,et al.  The Semantics of a Simple Language for Parallel Programming , 1974, IFIP Congress.

[15]  Paul Le Guernic,et al.  System-level co-simulation of integrated avionics using polychrony , 2011, SAC '11.

[16]  Laurent Nana,et al.  Scheduling and memory requirements analysis with AADL , 2005, SIGAda.

[17]  Samson Abramsky,et al.  Domain theory , 1995, LICS 1995.

[18]  Alan Burns,et al.  A survey of hard real-time scheduling for multiprocessor systems , 2011, CSUR.

[19]  J. Aronson.  Safety , 2009, BMJ : British Medical Journal.

[20]  Jérôme Hugues,et al.  Expressing and Enforcing User-Defined Constraints of AADL Models , 2010, 2010 15th IEEE International Conference on Engineering of Complex Computer Systems.

[21]  Jörgen Hansson,et al.  Flow Latency Analysis with the Architecture Analysis and Design Language (AADL) , 2007 .

[22]  Sandeep K. Shukla,et al.  Distributed Simulation of AADL Specifications in a Polychronous Model of Computation , 2009, 2009 International Conference on Embedded Software and Systems.

[23]  Alan Burns,et al.  Hard Real-Time Scheduling: The Deadline-Monotonic Approach , 1991 .

[24]  Marc Gyssens,et al.  Regular Expressions with Counting: Weak versus Strong Determinism , 2009, SIAM J. Comput..

[25]  Takeo Kanade,et al.  Models in Software Engineering , 2011, Lecture Notes in Computer Science.

[26]  Jean A. Peperstraete,et al.  Cycle-static dataflow , 1996, IEEE Trans. Signal Process..

[27]  A. A. Kountouris,et al.  Profiling of SIGNAL programs and its application in the timing evaluation of design implementations , 1996 .

[28]  Jan Vitek,et al.  Affine Data-Flow Graphs for the Synthesis of Hard Real-Time Applications , 2012, 2012 12th International Conference on Application of Concurrency to System Design.

[29]  Mamoun Filali,et al.  Formal Verification of AADL models with Fiacre and Tina , 2010 .

[30]  Edward A. Lee,et al.  Static Scheduling of Synchronous Data Flow Programs for Digital Signal Processing , 1989, IEEE Transactions on Computers.

[31]  Joseph Y.-T. Leung,et al.  On the complexity of fixed-priority scheduling of periodic, real-time tasks , 1982, Perform. Evaluation.

[32]  Dexter Kozen.  A Completeness Theorem for Kleene Algebras and the Algebra of Regular Events , 1994, Inf. Comput..

[33]  Julien DeAntoni,et al.  The clock constraint specification language for building timed causality models , 2010, Innovations in Systems and Software Engineering.

[34]  Maurice Heitz,et al.  Toward polychronous analysis and validation for timed software architectures in AADL , 2013, 2013 Design, Automation & Test in Europe Conference & Exhibition (DATE).

[35]  P.M.W. Knijnenburg.  Algebraic Domains, Chain Completion and the Plotkin Powerdomain Construction , 1993 .

[36]  Lui Sha,et al.  Compositional Verification of Architectural Models , 2012, NASA Formal Methods.

[37]  Dexter Kozen,et al.  A completeness theorem for Kleene algebras and the algebra of regular events , 1991, [1991] Proceedings Sixth Annual IEEE Symposium on Logic in Computer Science.

[38]  Frédéric Boniol,et al.  Scheduling Dependent Periodic Tasks without Synchronization Mechanisms , 2010, 2010 16th IEEE Real-Time and Embedded Technology and Applications Symposium.

[39]  Laurent Pautet,et al.  An Implementation of the Behavior Annex in the AADL-Toolset Osate2 , 2011, 2011 16th IEEE International Conference on Engineering of Complex Computer Systems.

[40]  Maryline Chetto,et al.  Dynamic scheduling of real-time tasks under precedence constraints , 1990, Real-Time Systems.

[41]  Ada Gavrilovska,et al.  Network Interfaces for High Performance Computing , 2016 .

[42]  Jacek Blazewicz,et al.  Scheduling Dependent Tasks with Different Arrival Times to Meet Deadlines , 1976, Performance.

[43]  Jean-Pierre Talpin,et al.  Design of safety-critical Java level 1 applications using affine abstract clocks , 2013, M-SCOPES.

[44]  Stephen A. Edwards,et al.  Compiling Esterel , 2007 .