Analog CMOS four-quadrant multiplier and divider

An analog CMOS four-quadrant multiplier and a two-quadrant divider circuit are introduced. The multiplier operates for a power supply /spl plusmn/1.5 V and its differential input range is /spl plusmn/1 V with less than 0.2% linearity error. The THD is less than 0.3% with input range up to /spl plusmn/0.8 V. The divider offers the facility of independent control of the sensitivity and has acceptable precision useful in analog signal processing, fuzzy control and instrumentation applications. Experimental results verify the simulation ones demonstrating the feasibility of both circuits.