A robust digital DC-DC converter with rail-to-rail output range in 40nm CMOS

The growing complexity and small form factors of hand-held consumer electronics are the driving force of more integration. This increases the need for truly embedded DC-DC converters in advanced processes. Traditional analog DC-DC converter architectures do not fit well with low supply voltages. Digital architectures are attractive, but require an analog-to-digital converter (ADC), which can be challenging to design [1–3].

[1]  D. Maksimović,et al.  Modeling of Quantization Effects in Digitally Controlled DC–DC Converters , 2007 .

[2]  Jinwen Xiao,et al.  A 4/spl mu/A-quiescent-current dual-mode buck converter IC for cellular phone applications , 2004, 2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No.04CH37519).

[3]  Xiaodong Liu,et al.  Recent developments in digital control strategies for DC/DC switching power converters , 2009, 2009 IEEE 6th International Power Electronics and Motion Control Conference.

[4]  Buf Buf,et al.  Fully Integrated Digital Controller IC for Buck Converter with a Differential-Sensing ADC , 2008 .

[5]  Zhaoming Qian,et al.  Reduction of digital PWM limit ring with novel control algorithm , 2001, APEC 2001. Sixteenth Annual IEEE Applied Power Electronics Conference and Exposition (Cat. No.01CH37181).

[6]  G. G. Stokes.  "J." , 1890, The New Yale Book of Quotations.

[7]  James C. Candy,et al.  Decimation for Sigma Delta Modulation , 1986, IEEE Trans. Commun..

[8]  I. Batarseh,et al.  Digital controller design for a practicing power electronics engineer , 2007, APEC 07 - Twenty-Second Annual IEEE Applied Power Electronics Conference and Exposition.