A CMOS Wideband Watt-Level 4096-QAM Digital Power Amplifier Using Reconfigurable Power-Combining Transformer

In this article, a wideband watt-level digital power amplifier (DPA) with high efficiency and large dynamic range is presented in CMOS technology for wireless applications. To achieve high output power with enhanced operation bandwidth (BW), the wideband matching network based on a reconfigurable power-combining transformer is used. Meanwhile, the <inline-formula> <tex-math notation="LaTeX">$L$ </tex-math></inline-formula>–<inline-formula> <tex-math notation="LaTeX">$C$ </tex-math></inline-formula> circuit is used to suppress the harmonics, which further improves the output power of the fundamental signal. In addition, the LO leakage is suppressed by the 12-bit power digital-to-analog converter (power DAC), which leads to high dynamic range of the proposed DPA. To verify the mechanism, a 1.2–3.6-GHz watt-level 12-bit polar DPA is implemented and fabricated using a conventional 40-nm CMOS technology. With 1.1-/2.5-V supply, the fabricated DPA exhibits peak output power (<inline-formula> <tex-math notation="LaTeX">$P_{\text {out}}$ </tex-math></inline-formula>) of 32.67 dBm, peak drain efficiency (DE) of 45.1%, and peak power-added efficiency (PAE) of 35.5% at 2 GHz. It supports 50-MSyms/s 256-QAM with average output power (<inline-formula> <tex-math notation="LaTeX">$P_{\text {avg}}$ </tex-math></inline-formula>) of 22.76 dBm, error vector magnitude (EVM) of −31.46 dB, and adjacent channel leakage ratio (ACLR) of −30.67 dBc, 10-MSyms/s 1024-QAM with <inline-formula> <tex-math notation="LaTeX">$P_{\text {avg}}$ </tex-math></inline-formula> of 25.54 dBm, EVM of −38.2 dB, and ACLR of −38.71 dBc, and 5-MSym/s 4096-QAM with <inline-formula> <tex-math notation="LaTeX">$P_{\text {avg}}$ </tex-math></inline-formula> of 22.97 dBm, EVM of −43.0 dB, and ACLR of −46.32 dBc, respectively.