A high performance machine paradigm based on auto-sequencing data memory

Introduces a novel (non-von Neumann) programming paradigm of parallel computation featuring a much more efficient implementation of parallel algorithms, as well as a novel (hardware) machine paradigm efficiently supporting such implementations. Acceleration factors of up to more than 2000 have been obtained experimentally on an example architecture for a number of important applications, although using a hardware being more simple than that of a single RISC microprocessor. Due to its auto-sequencing data memory the machine principles are partly related to the organization of associative memories or systems. The machine organization and its most important hardware features are briefly introduced. The programming paradigm and its flexibility is illustrated by a few application examples.<<ETX>>

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