Analysis of multi-domain scenarios for optimized dynamic power management strategies

Synchronous dataflow (SDF) models are gaining increased attention in designing software-intensive embedded systems. Especially in the signal processing and multimedia domain, dataflow-oriented models of computation are commonly used by designers reflecting the regular structure of algorithms and providing an intuitive way to specify both sequential and concurrent system functionality. Furthermore, dataflow-oriented models are qualified for capturing dynamic behavior due to data-dependent execution. In this work, we extend those data-dependent dataflow models to include dynamic power management (DPM) aspects of a target platform while still meeting hard timing requirements. We capture different system states in a multi-domain scenario approach and develop a state space based on this SDF representation for system analysis and optimization. By traversing the state space of the power-aware scenario modeling we derive a power management configuration with minimized energy dissipation depending on dynamic system behavior.

[1]  Margaret Martonosi,et al.  An Analysis of Efficient Multi-Core Global Power Management Policies: Maximizing Performance for a Given Power Budget , 2006, 2006 39th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO'06).

[2]  Marc Geilen,et al.  Synchronous dataflow scenarios , 2010, TECS.

[3]  Rami G. Melhem,et al.  Energy-Aware Scheduling for Streaming Applications on Chip Multiprocessors , 2007, 28th IEEE International Real-Time Systems Symposium (RTSS 2007).

[4]  ThiesWilliam,et al.  Exploiting coarse-grained task, data, and pipeline parallelism in stream programs , 2006 .

[5]  Joseph T. Buck.  A dynamic dataflow model suitable for efficient mixed hardware and software implementations of DSP applications , 1994, CODES.

[6]  Francky Catthoor,et al.  Managing dynamic concurrent tasks in embedded real-time multimedia systems , 2002, 15th International Symposium on System Synthesis, 2002..

[7]  Doug Locke,et al.  Introduction to special issue on Java technologies for real-time and embedded systems , 2010, TECS.

[8]  Michael I. Gordon,et al.  Exploiting coarse-grained task, data, and pipeline parallelism in stream programs , 2006, ASPLOS XII.

[9]  Sander Stuijk,et al.  Worst-case performance analysis of Synchronous Dataflow scenarios , 2010, 2010 IEEE/ACM/IFIP International Conference on Hardware/Software Codesign and System Synthesis (CODES+ISSS).

[10]  Luca Benini,et al.  A survey of design techniques for system-level dynamic power management , 2000, IEEE Trans. Very Large Scale Integr. Syst..

[11]  Axel Jantsch,et al.  International Conference on Hardware/Software Codesign and System Synthesis, CODES+ISSS 2020, Singapore, September 20-25, 2020 , 2020, CODES+ISSS.

[12]  Henk Corporaal,et al.  Intra-task scenario-aware voltage scheduling , 2005, CASES '05.

[13]  Luca Benini,et al.  A Feedback-Based Approach to DVFS in Data-Flow Applications , 2009, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

[14]  Gilles Kahn,et al.  The Semantics of a Simple Language for Parallel Programming , 1974, IFIP Congress.

[15]  Sander Stuijk,et al.  A scenario-aware data flow model for combined long-run average and worst-case performance analysis , 2006, Fourth ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2006. MEMOCODE '06. Proceedings..

[16]  Edward A. Lee,et al.  Static Scheduling of Synchronous Data Flow Programs for Digital Signal Processing , 1989, IEEE Transactions on Computers.

[17]  Edward A. Lee,et al.  Scheduling dynamic dataflow graphs with bounded memory using the token flow model , 1993, 1993 IEEE International Conference on Acoustics, Speech, and Signal Processing.

[18]  Massoud Pedram,et al.  Determining the Optimal Timeout Values for a Power-Managed System based on the Theory of Markovian Processes: Offline and Online Algorithms , 2006, Proceedings of the Design Automation & Test in Europe Conference.

[19]  Marc Geilen,et al.  Reduction techniques for Synchronous Dataflow graphs , 2009, 2009 46th ACM/IEEE Design Automation Conference.

[20]  Geert Jan Olsder,et al.  Synchronization and Linearity: An Algebra for Discrete Event Systems , 1994 .

[21]  Petru Eles,et al.  Energy Optimization of Multiprocessor Systems on Chip by Voltage Selection , 2007, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

[22]  Nathan Fisher,et al.  The Design of an EDF-Scheduled Resource-Sharing Open Environment , 2007, RTSS 2007.

[23]  Sandy Irani,et al.  Competitive analysis of dynamic power management strategies for systems with multiple power saving states , 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

[24]  Sander Stuijk,et al.  Exploring trade-offs in buffer requirements and throughput constraints for synchronous dataflow graphs , 2006, 2006 43rd ACM/IEEE Design Automation Conference.

[25]  Ali Iranli.  System-Level Power Management: An Overview , 2006 .

[26]  Henk Corporaal,et al.  System-scenario-based design of dynamic embedded systems , 2009, TODE.