Fully digital asynchronous symbol timing recovery in digital receiver

A new asynchronous symbol timing recovery scheme, implemented by an efficient interpolation filter (Spurbeck, M. and Behrens, R.T., 1997), timing-error detector (TED) (Gardner, F.M. 1986) and a loop filter (Gardner, F.M., 1993; Fitz, M.P. and Cramer, R.J., 1995), is proposed for a 16QAM local multipoint distribution service (LMDS) down stream receiver. The scheme is verified by an FPGA-based prototype with real data and also realized in an ASIC chip using the Toshiba 0.18 /spl mu/m standard cell library.