A 65nm CMOS CT ΔΣ Modulator with 81dB DR and 8MHz BW Auto-Tuned by Pulse Injection
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In the digital wireless SoC applications, CT DeltaSigma ADCs have been widely used for I/Q quantization due to the built-in anti-aliasing function and insensitivity to the input sampling error. They also offer higher-frequency performance than SC modulators as no critical opamp settling is required. CT modulators with low OSR have achieved a DR greater than 75 dB in a 20 MHz band. However, they all suffer from inaccurate active filtering as filter time constants are set by RC and C/Gm values that vary by as much as plusmn20 to 30%. By lowering OSR, the signal band can be widened, but the in-band zero of the NTF should be optimally placed to maximize the DR. Inaccurate NTF zero either degrades the DR or makes the modulator unstable. This work presents an exact time-constant auto-tuning method using an LMS algorithm. With a binary pulse dither injected into the loop at the input of the quantizer, the filter time constant can be calibrated continuously with crystal accuracy until the correlated residual pulse dither disappears in the digital output.
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