Memory device configured between processor and non-volatile memory, data transmitting and receiving method among memory device, processor and non-volatile memory

The system including the memory device and a memory device including an intervention which is located between a processor and non-volatile memory ( "NVM") is disclosed. The memory device according to an embodiment of the present invention is a memory for storing the received data from the processor or the NVM; And transmitting and receiving data between the processor or comprising a direct memory access controller ( "DMAC") for controlling the access of the memory from the NVM, the processor and the DMAC, the processor and the memory, and the DMAC and the memory In order to adjust and the DMAC includes arbiter (arbiter). The reduction and data transmission of the power consumption of the entire system by the operation of the arbiter can be quickly.