Evaluation of 600 V/100 A NPT-IGBT with a non-self-align shallow p-well formation techniques

Experimental results of planer gate IGBTs fabricated with newly developed a non-self-align shallow p-well formation technique are presented. The 600 V/100 A NPT-IGBT shows the on-state voltage drop of about 1.7 V, which is more than 0.4 V reduction compared to the conventional devices. The average short circuit withstand capability of about 30 /spl mu/sec was obtained without external current limiting functions.

[1]  T. Laska,et al.  1200 V-trench-IGBT study with square short circuit SOA , 1998, Proceedings of the 10th International Symposium on Power Semiconductor Devices and ICs. ISPSD'98 (IEEE Cat. No.98CH36212).

[2]  Ichiro Omura,et al.  A 4500 V injection enhanced insulated gate bipolar transistor (IEGT) operating in a mode similar to a thyristor , 1993, Proceedings of IEEE International Electron Devices Meeting.

[3]  T. Laska,et al.  Ultra thin-wafer technology for a new 600 V-NPT-IGBT , 1997, Proceedings of 9th International Symposium on Power Semiconductor Devices and IC's.

[4]  J. Sack,et al.  A new concept for a non punch through IGBT with MOSFET like switching characteristics , 1989, 20th Annual IEEE Power Electronics Specialists Conference.

[5]  J. Yamashita,et al.  A study on the short circuit destruction of IGBTs , 1993, [1993] Proceedings of the 5th International Symposium on Power Semiconductor Devices and ICs.