Universal Emulations with Sublogarithmic Slowdown (Extended Abstract)

The existence of bounded degree networks which can emulate the computation of any bounded degree network of the same size with logarithmic slowdown is well-known. The butterfly is an example of such a universal network. Leiserson was the first to introduce the concept of an area-universal network: a network with VLSI layout area A which can emulate any network of the same size and layout area with logarithmic slowdown. His results imply the existence of an N-node network with layout area O( N log2 N) which can emulate any N-node planar network with O(1og N) slowdown. The main results of this paper are:

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