Impact of Band-Tails on the Subthreshold Swing of III-V Tunnel Field-Effect Transistor

We present a simple model to evaluate the sharpness of the band edges for tunnel field-effect transistors (TFETs) by comparing the subthreshold swing and the conductance in the negative differential resistance region. This model is evaluated using experimental data from InAs/InGaAsSb/GaSb nanowire TFETs with the ability to reach a subthreshold swing well below the thermal limit. A device with the lowest subthreshold swing, 43 mV/decade at 0.1 V, exhibits also the sharpest band-edge decay parameter <inline-formula> <tex-math notation="LaTeX">${E}_{{0}}$ </tex-math></inline-formula> of 43.5 mV although in most cases the <inline-formula> <tex-math notation="LaTeX">${S} \ll {E}_{{0}}$ </tex-math></inline-formula>. The model explains the observed temperature dependence of the subthreshold swing.

[1]  R. A. Logan,et al.  Excess Tunnel Current in Silicon Esaki Junctions , 1961 .

[2]  J.A. del Alamo,et al.  Forward-bias tunneling: A limitation to bipolar device scaling , 1986, IEEE Electron Device Letters.

[3]  J. Schulman,et al.  Sb-heterostructure interband backward diodes , 2000, IEEE Electron Device Letters.

[4]  Heike Riel,et al.  Trap-assisted tunneling in Si-InAs nanowire heterojunction tunnel diodes. , 2011, Nano letters.

[5]  Roger K. Lake,et al.  Effects of band-tails on the subthreshold characteristics of nanowire band-to-band tunneling transistors , 2011 .

[6]  H. Schmid,et al.  InAs-Si heterojunction nanowire tunnel diodes and tunnel FETs , 2012, 2012 International Electron Devices Meeting.

[7]  E. Yablonovitch,et al.  Band-Edge Steepness Obtained From Esaki/Backward Diode Current–Voltage Characteristics , 2014, IEEE Transactions on Electron Devices.

[8]  Hao Lu,et al.  Universal analytic model for tunnel FET circuit simulation , 2015 .

[9]  Performance Evaluation of In0.53Ga0.47As Esaki Tunnel Diodes on Silicon and InP Substrates , 2015, IEEE Transactions on Electron Devices.

[10]  Erik Lind,et al.  III-V Heterostructure Nanowire Tunnel FETs , 2015, IEEE Journal of the Electron Devices Society.

[11]  Low Trap Density in InAs/High-k Nanowire Gate Stacks with Optimized Growth and Doping Conditions. , 2016, Nano letters.

[12]  Trap assisted tunneling and its effect on subthreshold swing of tunnel field effect transistors , 2016 .

[13]  Dimitri A. Antoniadis,et al.  Trap Assisted Tunneling and Its Effect on Subthreshold Swing of Tunnel FETs , 2016, IEEE Transactions on Electron Devices.

[14]  E. Memišević,et al.  Vertical InAs/GaAsSb/GaSb tunneling field-effect transistor on Si with S = 48 mV/decade and Ion = 10 μA/μm for Ioff = 1 nA/μm at Vds = 0.3 V , 2016, 2016 IEEE International Electron Devices Meeting (IEDM).

[15]  A. Schenk,et al.  Individual Defects in InAs/InGaAsSb/GaSb Nanowire Tunnel Field-Effect Transistors Operating below 60 mV/decade. , 2017, Nano letters.