Logic synthesis of digital systems can be divided into two different tasks: synthesis of the datapath and control synthesis. The Carlsruhe Digital Design System (CADDY) solves both tasks. Starting from a behavioral circuit description CADDY generates the structure of the datapath and a control graph (CG), which is the starting point for the synthesis of a finite state machine. In this paper we will concentrate on CASTOR, the FSM synthesis part in CADDY. It is well adapted to the properties of the internally generated contol graphs, but it is also a stand alone FSM synthesis system. We will first describe the FSM structure generator in CASTOR, then a new state assignment algorithm. Finally we will present our results for a standard benchmark set.
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