The NSLS-II at Brookhaven National Laboratory (BNL) started the user beam service in early 2015, and is currently operating 13 of the insertion device (ID) and beamlines as well as constructing new beamlines. The fast machine protection consists of an active interlock system (AIS), beam position monitor (BPM), cell controller (CCs) and front-end (FE) systems. The AIS measures the electron beam envelop and the dumps the beam by turning off RF system, and then the diagnostic system provides the post-mortem data for an analysis of which system caused the beam dump and the machine status analysis. NSLS-II post-mortem system involves AIS, CCs, BPMs, radio frequency system (RFs), power supply systems (PSs) as well as the timing system. This paper describes the AIS architecture and PM performance for NSLS-II safe operations. INTRODUCTION NSLS-II storage ring (SR) completed commissioning in 2014 [1-2], and started operation and user beam service in 2015. In 2016, up to 16 insertion devices were installed as well as the user service with two superconducting RF cavity and 250 mA stored beam current. The active interlock system is one of the major machine protection systems from the synchrotron radiation. The main purpose of AIS is to protect the insertion device vacuum chamber and the storage ring vacuum chamber from missteered synchrotron radiations from IDs and Dipole magnets radiation. The required active interlock insertion device (AI-ID) system response time is maximum < 1 ms, because through 1 ms duration damping wiggler (DW) aluminum vacuum chamber will increase the surface temperature to 100 C at 1.5 mrad vertical angles. For the storage ring bending magnet protection, which is called the active interlock bending magnet (AI-BM), the response time is 10 ms. Allowance envelop defined for protecting the device and configured offset is xy=+/-0.5 mm, and the angle is xy=+/0.25 mrad. This paper will present the AIS hardware configuration, FPGA internal functions, global PM hardware configuration and internal timing diagrams. NSLS-II operation status and the future plan. SYSTEM DESCRIPTION NSLS-II AIS showed robust and stable performance during operation, and lots of flexibilities for implementing machine protection from the synchrotron radiation and critical machine faults. One of the benefits is the real-time offset/angle calculation, and all of the decision engines are located at the central FPGA core, which is called C31. The AIS hardware layout is shown in Fig 1, and more details of the system and each device regarding characteristics and functions are described in [1-2]. AI Database And Web interface softIO C1 softIO C2 AI FPGA Interfa ce RF Transmitter and LLRF C OPI-CSS PM Client DISK Storage EPS RF Transmitter and LLRF D Input signals from machine Ethernet cable (1 Gbps) Wire (TTL) SDI fiber network (5 Gbps) Cell 1 Cell 30 SDI CW SDI CCW Timing