Neural Signal Conditioning Circuits

The increasing density and the miniaturization of the functional blocks in these multi-electrode arrays presents significant circuit design challenge in terms of area, power, and the scalability, reliability and expandability of the recording system. In this chapter, we present a neural signal conditioning circuit for biomedical implantable devices, which includes low-noise signal amplification and band-pass filtering. The circuit is realized in a 65 nm CMOS technology, and consumes less than 1.5 μW. The fully differential low-noise amplifier achieves 40 dB closed loop gain, occupies an area of 0.04 mm2, and has input referred noise of 3.1 μVrms over the operating bandwidth 0.1–20 kHz. The capacitive-attenuation band-pass filter with first-order slopes achieves 65 dB dynamic range , 210 mVrms at 2 % THD and 140 μVrms total integrated output noise.

[1]  Scott K. Arfin.  Low power circuits and systems for wireless neural stimulation , 2011 .

[2]  Germano Nicollini,et al.  A fully differential sample-and-hold circuit for high-speed applications , 1989 .

[3]  R. R. Harrison,et al.  A low-power low-noise CMOS amplifier for neural recording applications , 2003, IEEE J. Solid State Circuits.

[4]  Dong Han,et al.  A 0.45 V 100-Channel Neural-Recording IC With Sub-$\mu {\rm W}$/Channel Consumption in 0.18 $\mu{\rm m}$ CMOS , 2013, IEEE Transactions on Biomedical Circuits and Systems.

[5]  Ramesh Harjani,et al.  An integrated low-voltage class AB CMOS OTA , 1999 .

[6]  E. Sanchez-Sinencio,et al.  A highly linear pseudo-differential transconductance [CMOS OTA] , 2004, Proceedings of the 30th European Solid-State Circuits Conference.

[7]  Karim Abdelhalim,et al.  64-Channel UWB Wireless Neural Vector Analyzer SOC With a Closed-Loop Phase Synchrony-Triggered Neurostimulator , 2013, IEEE Journal of Solid-State Circuits.

[8]  Jordi Parramon,et al.  A Micropower Low-Noise Neural Recording Front-End Circuit for Epileptic Seizure Detection , 2011, IEEE Journal of Solid-State Circuits.

[9]  J. Huijsing,et al.  Design of low-voltage, low-power operational amplifier cells , 1996 .

[10]  Refet Firat Yazicioglu,et al.  An implantable 455-active-electrode 52-channel CMOS neural probe , 2013, 2013 IEEE International Solid-State Circuits Conference Digest of Technical Papers.

[11]  W.M.C. Sansen,et al.  A micropower low-noise monolithic instrumentation amplifier for medical purposes , 1987 .

[12]  G. Geelen,et al.  A fast-settling CMOS op amp for SC circuits with 90-dB DC gain , 1990 .

[13]  Moo Sung Chae,et al.  Design Optimization for Integrated Neural Recording Systems , 2008, IEEE Journal of Solid-State Circuits.

[14]  S. Koekkoek,et al.  Spatiotemporal firing patterns in the cerebellum , 2011, Nature Reviews Neuroscience.

[15]  Hae-Seung Lee,et al.  A high-swing CMOS telescopic operational amplifier , 1998 .

[16]  Rahul Sarpeshkar,et al.  An Energy-Efficient Micropower Neural Recording Amplifier , 2007, IEEE Transactions on Biomedical Circuits and Systems.

[17]  P. Gray,et al.  High-frequency CMOS switched-capacitor filters for communications application , 1983 .

[18]  B.K. Ahuja,et al.  An improved frequency compensation technique for CMOS operational amplifiers , 1983, IEEE Journal of Solid-State Circuits.