RAGra: Leveraging Monolithic 3D ReRAM for Massively-Parallel Graph Processing
暂无分享,去创建一个
Hai Jin | Long Zheng | Xiaofei Liao | Yu Huang | Pengcheng Yao | Chuangyi Gui | Hai Jin | Long Zheng | Yu Huang | Pengcheng Yao | Chuangyi Gui | Xiaofei Liao
[1] Christoforos E. Kozyrakis,et al. GraphP: Reducing Communication for PIM-Based Graph Processing with Efficient Data Partition , 2018, 2018 IEEE International Symposium on High Performance Computer Architecture (HPCA).
[2] Margaret Martonosi,et al. Graphicionado: A high-performance and energy-efficient accelerator for graph analytics , 2016, 2016 49th Annual IEEE/ACM International Symposium on Microarchitecture (MICRO).
[3] Wei Zhang,et al. 3D-HIM: A 3D High-density Interleaved Memory for bipolar RRAM design , 2011, 2011 IEEE/ACM International Symposium on Nanoscale Architectures.
[4] Y. Y. Lin,et al. Multi-layer sidewall WOX resistive memory suitable for 3D ReRAM , 2012, 2012 Symposium on VLSI Technology (VLSIT).
[5] Dong Li,et al. DESTINY: A tool for modeling emerging 3D NVM and eDRAM caches , 2015, 2015 Design, Automation & Test in Europe Conference & Exhibition (DATE).
[6] Wenguang Chen,et al. GridGraph: Large-Scale Graph Processing on a Single Machine Using 2-Level Hierarchical Partitioning , 2015, USENIX ATC.
[7] Yiran Chen,et al. GraphR: Accelerating Graph Processing Using ReRAM , 2017, 2018 IEEE International Symposium on High Performance Computer Architecture (HPCA).
[8] Pengcheng Yao,et al. An efficient graph accelerator with parallel data conflict management , 2018, PACT.
[9] Ozcan Ozturk,et al. Energy Efficient Architecture for Graph Analytics Accelerators , 2016, 2016 ACM/IEEE 43rd Annual International Symposium on Computer Architecture (ISCA).
[10] Miao Hu,et al. ISAAC: A Convolutional Neural Network Accelerator with In-Situ Analog Arithmetic in Crossbars , 2016, 2016 ACM/IEEE 43rd Annual International Symposium on Computer Architecture (ISCA).
[11] Jure Leskovec,et al. {SNAP Datasets}: {Stanford} Large Network Dataset Collection , 2014 .
[12] Chaitali Chakrabarti,et al. Design and Analysis of Energy-Efficient and Reliable 3-D ReRAM Cross-Point Array System , 2018, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.