Codesign for Real-Time Video Applications

1. Introduction. 2. Design Project: Video Compression System. 3. Design Methodology. 4. Quantitative Analysis. 5. Design Tools. 6. HTML-Based Codesign Framework. 7. Results. 8. Conclusions. References.

[1]  Alice C. Parker,et al.  The high-level synthesis of digital systems , 1990, Proc. IEEE.

[2]  Tatsuo Ishiguro,et al.  VLSI in picture coding , 1993, J. VLSI Signal Process..

[3]  Michel Auguin,et al.  Automatic exploration of VLIW processor architectures from a designer's experience based specification , 1994, CODES.

[4]  Ian H. Witten,et al.  Arithmetic coding for data compression , 1987, CACM.

[5]  Robert A. Walker,et al.  A Survey of high-level synthesis systems , 1991 .

[6]  William P. Birmingham,et al.  MICON: Automated Design of Computer Systems , 1991 .

[7]  Nicholas P. Negroponte,et al.  PRODUCTS AND SERVICES FOR COMPUTER NETWORKS , 1991 .

[8]  Karl M. Guttag,et al.  A single-chip multiprocessor for multimedia: the MVP , 1992, IEEE Computer Graphics and Applications.

[9]  Erik Wilde Hypertext Markup Language (HTML) , 1999 .

[10]  Jörg Wilberg,et al.  Codesign of hardware, software, and algorithms-a case study , 1996, 1996 IEEE International Symposium on Circuits and Systems. Circuits and Systems Connecting the World. ISCAS 96.

[11]  Larry Wall,et al.  Programming Perl , 1991 .

[12]  Norman P. Jouppi,et al.  Available instruction-level parallelism for superscalar and superpipelined machines , 1989, ASPLOS III.

[13]  Heinrich Theodor Vierhaus,et al.  Local microcode generation in system design , 1994, Code Generation for Embedded Processors.

[14]  F. Colaitis,et al.  Standardizing hypermedia information objects , 1992, IEEE Communications Magazine.

[15]  Hisashi Kodama,et al.  A video digital signal processor with a vector-pipeline architecture , 1992 .

[16]  Didier J. Le Gall,et al.  The MPEG video compression algorithm , 1992, Signal Process. Image Commun..

[17]  Ken Kennedy,et al.  Analysis and transformation in an interactive parallel programming tool , 1993, Concurr. Pract. Exp..

[18]  Mohamed I. Elmasry,et al.  Architectural synthesis for DSP silicon compilers , 1989, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[19]  M. Ohta,et al.  Wevelet Picture Coding with Transform Coding Approach , 1992 .

[20]  Alok Sharma,et al.  Estimating Architectural Resources and Performance for High-Level Synthesis Applications , 1993, 30th ACM/IEEE Design Automation Conference.

[21]  Michael D. Smith,et al.  Tracing with Pixie , 1991 .

[22]  Kunle Olukotun,et al.  A software-hardware cosynthesis approach to digital system simulation , 1994, IEEE Micro.

[23]  R. Gray,et al.  Vector quantization , 1984, IEEE ASSP Magazine.

[24]  Donald E. Thomas,et al.  Architectural partitioning for system level synthesis of integrated circuits , 1991, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[25]  Andrew F. Laine,et al.  Wavelet Theory and Application , 1993, Springer US.

[26]  Ruby B. Lee Precision architecture , 1989, Computer.

[27]  Markus Theißinger,et al.  CASTLE: an interactive environment for HW-SW Co-Design , 1994, CODES.

[28]  John W. Woods,et al.  Subband coding of images , 1986, IEEE Trans. Acoust. Speech Signal Process..

[29]  Pascal Raymond,et al.  The synchronous data flow programming language LUSTRE , 1991, Proc. IEEE.

[30]  Henk Corporaal,et al.  Software pipelining for transport-triggered architectures , 1991, MICRO 24.

[31]  Pierre G. Paulin,et al.  DSP design tool requirements for embedded systems: A telecommunications industrial perspective , 1995, J. VLSI Signal Process..

[32]  Ronald A. DeVore,et al.  Image compression through wavelet transform coding , 1992, IEEE Trans. Inf. Theory.

[33]  Wayne Wolf,et al.  High-Level VLSI Synthesis , 1991 .

[34]  Ahmad Fadzil M. Hani,et al.  Video subband VQ coding at 64 kbit/s using short-kernel filter banks with an improved motion estimation technique , 1991, Signal Process. Image Commun..

[35]  Yu-Chin Hsu,et al.  A formal approach to the scheduling problem in high level synthesis , 1991, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[36]  Stephen Purcell,et al.  C-Cube MPEG video processor , 1992, Electronic Imaging.

[37]  Chung-Ping Chung,et al.  Adoptability and effectiveness of microcode compaction algorithms in superscalar processing , 1992, Parallel Comput..

[38]  Alice C. Parker,et al.  Experience with Image Compression Chip Design Using Unified System Construction Tools , 1994, 31st Design Automation Conference.

[39]  Peter A. Ruetz,et al.  A high-performance full-motion video compression chip set , 1992, IEEE Trans. Circuits Syst. Video Technol..

[40]  Anoop Gupta,et al.  COOL: An object-based language for parallel programming , 1994, Computer.

[41]  Robert J. Gove Architectures for single-chip image computing , 1992, Electronic Imaging.

[42]  Ingrid Daubechies,et al.  Ten Lectures on Wavelets , 1992 .

[43]  Allen Gersho,et al.  Vector quantization and signal compression , 1991, The Kluwer international series in engineering and computer science.

[44]  Peter Pirsch,et al.  Hierarchical multiprocessor system for video signal processing , 1992, Other Conferences.

[45]  Giovanni De Micheli,et al.  Computer-aided hardware-software codesign , 1994, IEEE Micro.

[46]  Chuck Monahan,et al.  Symbolic Modeling and Evaluation of Data Paths , 1995, 32nd Design Automation Conference.

[47]  Edward A. Lee,et al.  A global criticality/local phase driven algorithm for the constrained hardware/software partitioning problem , 1994, CODES.

[48]  Frédéric Boussinot,et al.  The ESTEREL language , 1991, Proc. IEEE.

[49]  Andrew Wolfe,et al.  TigerSwitch: a case study in embedded computing system design , 1994, CODES.

[50]  Roger L. Fetterman,et al.  Mainstream Multimedia: Applying Multimedia in Business , 1993 .

[51]  Ming-Ting Sun,et al.  An all-ASIC implementation of a low bit-rate video codec , 1992, IEEE Trans. Circuits Syst. Video Technol..

[52]  Toshihiro Minami,et al.  A 300-MOPS Video Signal Processor With A Parallel Architecture , 1991 .

[53]  Wayne Wolf,et al.  Hardware-software co-design of embedded systems , 1994, Proc. IEEE.

[54]  Patrice Quinton,et al.  Towards a multi-formalism framework for architectural synthesis: the ASAR project , 1994, CODES '94.

[55]  Jørgen Staunstrup,et al.  The priority queue as an example of hardware/software codesign , 1994, CODES.

[56]  Adrian Nye,et al.  Managing INTERNET Information Services , 1994, WWW Spring 1994.

[57]  W. Wayt Gibbs,et al.  Software's Chronic Crisis , 1994 .

[58]  Leslie Kohn,et al.  MPEG video decoding with the UltraSPARC visual instruction set , 1995, Digest of Papers. COMPCON'95. Technologies for the Information Superhighway.

[59]  A. Jacquin Fractal image coding: a review , 1993, Proc. IEEE.

[60]  Heinrich Theodor Vierhaus,et al.  A codesign methodology for high performance embedded systems , 1996 .

[61]  Constantine D. Polychronopoulos Parallel Programming Issues , 1993, Int. J. High Speed Comput..

[62]  Wolfgang Rosenstiel,et al.  Design flow for hardware/software cosynthesis of a video compression system , 1994, Third International Workshop on Hardware/Software Codesign.

[63]  Pierre G. Paulin,et al.  Force-directed scheduling for the behavioral synthesis of ASICs , 1989, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[64]  R. Gray,et al.  Using vector quantization for image processing , 1993, Proc. IEEE.

[65]  Edward A. Lee,et al.  Ptolemy: A Framework for Simulating and Prototyping Heterogenous Systems , 2001, Int. J. Comput. Simul..

[66]  Nick Kingsbury,et al.  Video compression using lapped transforms for motion estimation/compensation and coding , 1992, Other Conferences.

[67]  Giovanni De Micheli,et al.  Synthesis and Optimization of Digital Circuits , 1994 .

[68]  Keith Diefendorff,et al.  The PowerPC user instruction set architecture , 1994, IEEE Micro.

[69]  Peter Pirsch,et al.  A VLSI based MIMD architecture of a multiprocessor system for real-time video processing applications , 1993, J. VLSI Signal Process..

[70]  Klaus Buchenrieder,et al.  HW/SW Co-Design with PRAMs Using CoDES , 1993, CHDL.

[71]  Niklaus Wirth,et al.  A Plea for Lean Software , 1995, Computer.

[72]  Alok Choudhary,et al.  Retargetable high performance Fortran compiler challenges , 1993, Digest of Papers. Compcon Spring.

[73]  Wei Li,et al.  New trends in very low bitrate video coding , 1995, Proc. IEEE.

[74]  Allen Gersho,et al.  Advances in speech and audio compression , 1994, Proc. IEEE.

[75]  David Auld A flexible chip set for intra frame video compression , 1991, COMPCON Spring '91 Digest of Papers.

[76]  P. Pirsch,et al.  Advances in picture coding , 1985, Proceedings of the IEEE.

[77]  Robert J. Safranek,et al.  Signal compression based on models of human perception , 1993, Proc. IEEE.

[78]  Teresa H. Meng,et al.  Portable video-on-demand in wireless communication , 1995, Proc. IEEE.

[79]  Don Libes,et al.  Exploring Expect , 1994 .

[80]  Peter Pirsch,et al.  VLSI architectures for video compression-a survey , 1995, Proc. IEEE.

[81]  Peter Pirsch,et al.  VLSI Architectures for Digital Video Signal Processing , 1992 .

[82]  Stéphane Mallat,et al.  A Theory for Multiresolution Signal Decomposition: The Wavelet Representation , 1989, IEEE Trans. Pattern Anal. Mach. Intell..

[83]  Philip Smith,et al.  CD-I Designers Guide , 1992 .

[84]  Donatella Sciuto,et al.  HW/SW codesign for embedded telecom systems , 1994, Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computers and Processors.

[85]  S. Turner,et al.  A complete single-chip implementation of the JPEG image compression standard , 1991, Proceedings of the IEEE 1991 Custom Integrated Circuits Conference.

[86]  Raul Camposano,et al.  VLIW Processor Codesign for Video Processing , 1997, Des. Autom. Embed. Syst..

[87]  Nicolas Halbwachs,et al.  Synchronous Programming of Reactive Systems , 1992, CAV.

[88]  Wen-Hsiung Chen,et al.  A Fast Computational Algorithm for the Discrete Cosine Transform , 1977, IEEE Trans. Commun..

[89]  Nader Vasseghi,et al.  The Mips R4000 processor , 1992, IEEE Micro.

[90]  David A. Patterson,et al.  Computer Architecture: A Quantitative Approach , 1969 .

[91]  Ketan Mayer-Patel,et al.  Performance of a software MPEG video decoder , 1993, MULTIMEDIA '93.

[92]  Giovanni De Micheli,et al.  Hardware-software cosynthesis for digital systems , 1993, IEEE Design & Test of Computers.

[93]  Wolfgang Rosenstiel,et al.  Scheduling and Assignment in High Level Synthesis , 1991 .

[94]  R. Gray Entropy and Information Theory , 1990, Springer New York.

[95]  Gregory K. Wallace,et al.  The JPEG still picture compression standard , 1991, CACM.

[96]  Lyman P. Hurd,et al.  Fractal image compression , 1993 .

[97]  Alexandru Nicolau,et al.  A performance evaluator for parameterized ASIC architectures , 1994, EURO-DAC '94.

[98]  Miodrag Potkonjak,et al.  Estimating implementation bounds for real time DSP application specific circuits , 1994, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[99]  P. Marwedel,et al.  Cooperation of synthesis, retargetable code generation and test generation in the MSS , 1993, 1993 European Conference on Design Automation with the European Event in ASIC Design.

[100]  Hironori Yamauchi,et al.  Architecture and implementation of a highly parallel single-chip video DSP , 1992, IEEE Trans. Circuits Syst. Video Technol..

[101]  Henrique S. Malvar,et al.  The LOT: transform coding without blocking effects , 1989, IEEE Trans. Acoust. Speech Signal Process..

[102]  Mohamed Abid,et al.  COSMOS: a codesign approach for communicating systems , 1994, CODES.

[103]  Giovanni De Micheli,et al.  Scheduling with environmental constraints based on automata representations , 1994, Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC.

[104]  Joan L. Mitchell,et al.  JPEG: Still Image Data Compression Standard , 1992 .

[105]  Ed F. Deprettere Example of combined algorithm development and architecture design , 1993, Integr..

[106]  Masahiko Yoshimoto,et al.  A 100-MHz 2-D discrete cosine transform core processor , 1992 .

[107]  Ruby B. Lee Realtime MPEG video via software decompression on a PA-RISC processor , 1995, Digest of Papers. COMPCON'95. Technologies for the Information Superhighway.

[108]  Hugo De Man,et al.  Data routing: a paradigm for efficient data-path synthesis and code generation , 1994, Proceedings of 7th International Symposium on High-Level Synthesis.

[109]  Richard L. Sites,et al.  Alpha AXP architecture , 1993, CACM.

[110]  Thomas Sikora,et al.  Digital video coding standards and their role in video communications , 1995, Proc. IEEE.

[111]  K. Diefendorff,et al.  Evolution of the PowerPC architecture , 1994, IEEE Micro.

[112]  Ken Kennedy,et al.  Compiling Fortran D for MIMD distributed-memory machines , 1992, CACM.

[113]  Nasr Ullah,et al.  Resolution of data and control-flow dependencies in the PowerPC 601 , 1994, IEEE Micro.

[114]  Hsueh-Ming Hang,et al.  Image and video coding standards , 1993, AT&T Technical Journal.

[115]  William P. Birmingham,et al.  Automating the design of computer systems , 1993, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[116]  Liam Goudge,et al.  Embedded control problems, Thumb, and the ARM7TDMI , 1995, IEEE Micro.

[117]  Tokumichi Murakami,et al.  A DSP architectural design for low bit-rate motion video codec , 1989 .

[118]  Daniel D. Gajski,et al.  High ― Level Synthesis: Introduction to Chip and System Design , 1992 .

[119]  Ruby B. Lee Accelerating multimedia with enhanced microprocessors , 1995, IEEE Micro.

[120]  Arnaud E. Jacquin,et al.  Image coding based on a fractal theory of iterated contractive image transformations , 1992, IEEE Trans. Image Process..

[121]  A. Richard Newton,et al.  An application of a synchronous~reactive semantics to the vhdl language , 1992 .

[122]  M. Bierling,et al.  Displacement Estimation By Hierarchical Blockmatching , 1988, Other Conferences.

[123]  Albert Benveniste,et al.  The synchronous approach to reactive and real-time systems , 1991 .

[124]  Edward S. Davidson,et al.  The Cedar system and an initial performance study , 1998, ISCA '98.

[125]  Alice C. Parker,et al.  Predicting system-level area and delay for pipelined and nonpipelined designs , 1992, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

[126]  Bjarne Stroustrup,et al.  C++ Programming Language , 1986, IEEE Softw..

[127]  David Harel,et al.  Statecharts: A Visual Formalism for Complex Systems , 1987, Sci. Comput. Program..

[128]  T. C. May,et al.  Instruction-set matching and selection for DSP and ASIP code generation , 1994, Proceedings of European Design and Test Conference EDAC-ETC-EUROASIC.

[129]  Edward A. Lee,et al.  A hardware-software codesign methodology for DSP applications , 1993, IEEE Design & Test of Computers.

[130]  Mike Johnson,et al.  Superscalar microprocessor design , 1991, Prentice Hall series in innovative technology.

[131]  Henk Corporaal,et al.  Code generation for transport triggered architectures , 1994, Code Generation for Embedded Processors.

[132]  A. Alomary,et al.  PEAS-I: A hardware/software co-design system for ASIPs , 1993, Proceedings of EURO-DAC 93 and EURO-VHDL 93- European Design Automation Conference.

[133]  Konstantinos Konstantinides,et al.  Monolithic architectures for image processing and compression , 1992, IEEE Computer Graphics and Applications.

[134]  Henk Corporaal,et al.  MOVE: a framework for high-performance processor design , 1991, Proceedings of the 1991 ACM/IEEE Conference on Supercomputing (Supercomputing '91).

[135]  Xiaobo Sharon Hu,et al.  Codesign of architectures for automotive powertrain modules , 1994, IEEE Micro.

[136]  Eric Aardoom,et al.  A processor framework customized for navigation computations , 1992, Integr..

[137]  F Baskett,et al.  Microprocessors: From Desktops to Supercomputers , 1993, Science.

[138]  Edward A. Lee,et al.  Manifestations of Heterogeneity in Hardware/Software Codesign , 1994, 31st Design Automation Conference.

[139]  S.C. Purcell The C-cube CL550-JPEG image compression processor , 1991, COMPCON Spring '91 Digest of Papers.

[140]  Bryan D. Ackland,et al.  A video-codec chip set for multimedia applications , 1993, AT&T Technical Journal.

[141]  Ahmed Amine Jerraya,et al.  Linking System Design Tools and Hardware Design Tools , 1993, CHDL.

[142]  Michel Barlaud,et al.  Image coding using wavelet transform , 1992, IEEE Trans. Image Process..

[143]  Geoffrey C. Fox,et al.  The physical structure of concurrent problems and concurrent computers , 1988, Philosophical Transactions of the Royal Society of London. Series A, Mathematical and Physical Sciences.

[144]  Larry Press The Internet and interactive television , 1993, CACM.

[145]  Takao Nishitani,et al.  A real-time video signal processor suitable for motion picture coding applications , 1989 .

[146]  Majid Rabbani,et al.  Selected papers on image coding and compression , 1992 .

[147]  Raul Camposano,et al.  Design of an embedded video compression system-a quantitative approach , 1994, Proceedings 1994 IEEE International Conference on Computer Design: VLSI in Computers and Processors.

[148]  Hsieh Hou,et al.  A Fast Recursive Algorithm For Computing The Discrete Cosine Transform , 1986, Optics & Photonics.

[149]  Jens P. Brage,et al.  Codesign analysis of a computer graphics application , 1996, Des. Autom. Embed. Syst..

[150]  Giovanni De Micheli,et al.  Program implementation schemes for hardware-software systems , 1994, Computer.

[151]  John K. Ousterhout,et al.  Tcl and the Tk Toolkit , 1994 .

[152]  Nikil Dutt,et al.  The GENUS User Manual and C Programming Library , 1993 .

[153]  B. Ackland,et al.  The role of VLSI in multimedia , 1993, Symposium 1993 on VLSI Circuits.