On methods to improve location based logic diagnosis
暂无分享,去创建一个
Sudhakar M. Reddy | Wu-Tung Cheng | Wei Zou | Huaxing Tang | S. Reddy | Wu-Tung Cheng | Huaxing Tang | Wei Zou
[1] Wojciech Maly,et al. Progressive bridge identification , 2003, International Test Conference, 2003. Proceedings. ITC 2003..
[2] John B. Shoven,et al. I , Edinburgh Medical and Surgical Journal.
[3] Shi-Yu Huang. Speeding up the Byzantine fault diagnosis using symbolic simulation , 2002, Proceedings 20th IEEE VLSI Test Symposium (VTS 2002).
[4] J.A. Waicukauski,et al. Failure diagnosis of structured VLSI , 1989, IEEE Design & Test of Computers.
[5] Wojciech Maly,et al. Benchmarking diagnosis algorithms with a diverse set of IC deformations , 2004, 2004 International Conferce on Test.
[6] Kozo Kinoshita,et al. Fault diagnosis for physical defects of unknown behaviors , 2003, 2003 Test Symposium.
[7] Wojciech Maly,et al. Fault tuples in diagnosis of deep-submicron circuits , 2002, Proceedings. International Test Conference.
[8] Tracy Larrabee,et al. Diagnosing realistic bridging faults with single stuck-at information , 1998, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[9] Kenneth M. Butler,et al. On applying non-classical defect models to automated diagnosis , 1998, Proceedings International Test Conference 1998 (IEEE Cat. No.98CH36270).
[10] Hiroshi Takahashi,et al. On diagnosing multiple stuck-at faults using multiple and singlefault simulation in combinational circuits , 2002, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[11] Tracy Larrabee,et al. Multiplets, models, and the search for meaning: improving per-test fault diagnosis , 2002, Proceedings. International Test Conference.
[12] M. Ray Mercer,et al. Using logic models to predict the detection behavior of statistical timing defects , 2003, International Test Conference, 2003. Proceedings. ITC 2003..
[13] Sungju Park,et al. Why is less information from logic simulation more useful in fault simulation? , 1990, Proceedings. International Test Conference 1990.
[14] Srikanth Venkataraman,et al. POIROT: a logic fault diagnosis tool and its applications , 2000, Proceedings International Test Conference 2000 (IEEE Cat. No.00CH37159).
[15] Srikanth Venkataraman,et al. A technique for logic fault diagnosis of interconnect open defects , 2000, Proceedings 18th IEEE VLSI Test Symposium.
[16] Malgorzata Marek-Sadowska,et al. An efficient and effective methodology on the multiple fault diagnosis , 2003, International Test Conference, 2003. Proceedings. ITC 2003..
[17] Tracy Larrabee,et al. Probabilistic mixed-model fault diagnosis , 1998, Proceedings International Test Conference 1998 (IEEE Cat. No.98CH36270).
[18] Leendert M. Huisman,et al. Diagnosing combinational logic designs using the single location at-a-time (SLAT) paradigm , 2001, Proceedings International Test Conference 2001 (Cat. No.01CH37260).
[19] Bernd Koenemann. Test In the Era of "What You see Is NOT What You Get" , 2004, ITC.
[20] Melvin A. Breuer,et al. Digital systems testing and testable design , 1990 .
[21] Sreejit Chakravarty,et al. Algorithms for current monitor based diagnosis of bridging and leakage faults , 1992, [1992] Proceedings 29th ACM/IEEE Design Automation Conference.
[22] S.D. Millman,et al. Diagnosing CMOS bridging faults with stuck-at fault dictionaries , 1990, Proceedings. International Test Conference 1990.
[23] Hiroshi Takahashi,et al. Incremental diagnosis of multiple open-interconnects , 2002, Proceedings. International Test Conference.
[24] B. Koenemann. Test in the era of "What you see is not what you get" - Keynote address , 2004 .