Resonation-based hybrid continuous-time/discrete-time cascade ΣΔ modulators: application to 4G wireless telecom

This paper presents innovative architectures of hybrid Continuous-Time/Discrete-Time (CT/DT) cascade ΣΔ Modulators (ΣΔMs) made up of a front-end CT stage and a back-end DT stage. In addition to increasing the digitized signal bandwidth as compared to conventional ΣΔMs, the proposed topologies take advantage of the CT nature of the front-end ΣΔM stage, by embedding anti-aliasing filtering as well as their suitability to operate up to the GHz range. Moreover, the presented modulators include multi-bit quantization and Unity Signal Transfer Function (USTF) in both stages to reduce the integrator output swings, and programmable resonation to optimally distribute the zeroes of the overall Noise Transfer Function (NTF), such that the in-band quantization noise is minimized for each operation mode. Both local and inter-stage (global) based resonation architectures are synthesized and compared in terms of their circuit complexity, resolution-bandwidth programmability and robustness with respect to circuit non-ideal effects. The combination of all mentioned characteristics results in novel hybrid ΣΔMs, very suited for the implementation of adaptive/reconfigurable Analog-to-Digital Converters (ADCs) intended for the 4th Generation (4G) of wireless telecom systems.

[1]  Frank H. P. Fitzek,et al.  Defining 4G technology from the users perspective , 2006, IEEE Network.

[2]  Hung-Chih Liu,et al.  Correction to "A Third-Order Modulator in 0.18- m CMOS With Calibrated Mixed-Mode Integrators" , 2005 .

[3]  In-Cheol Park,et al.  A third-order /spl Sigma//spl Delta/ modulator in 0.18-/spl mu/m CMOS with calibrated mixed-mode integrators , 2005 .

[4]  R. V. Veldhoven A triple-mode continuous-time ΣΔ modulator with switched-capacitor feedback DAC for a GSM-EDGE/CDMA2000/UMTS receiver , 2003, IEEE J. Solid State Circuits.

[5]  G. Temes,et al.  Wideband low-distortion delta-sigma ADC topology , 2001 .

[6]  F. Svelto,et al.  Toward multistandard mobile terminals - fully integrated receivers requirements and architectures , 2005, IEEE Transactions on Microwave Theory and Techniques.

[7]  Bas M. Putter A 5,sup>th-order CT/DT Multi-Mode ΔΣ Modulator , 2007, 2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers.

[8]  Francisco V. Fernández,et al.  Adaptive CMOS analog circuits for 4G mobile terminals - Review and state-of-the-art survey , 2009, Microelectron. J..

[9]  Mohammed Ismail,et al.  Data converters for wireless standards , 2001 .

[10]  M. Steer Beyond 3G , 2007, IEEE Microwave Magazine.

[11]  Gabor C. Temes,et al.  An efficient ΔΣ ADC architecture for low oversampling ratios , 2004, IEEE Trans. Circuits Syst. I Regul. Pap..

[12]  R.H.M. van Veldhoven A triple-mode continuous-time /spl Sigma//spl Delta/ modulator with switched-capacitor feedback DAC for a GSM-EDGE/CDMA2000/UMTS receiver , 2003 .

[13]  K. Nguyen,et al.  A 106dB SNR hybrid oversampling ADC for digital audio , 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

[14]  Bruce A. Wooley,et al.  A 77-dB Dynamic Range, 7.5-MHz Hybrid Continuous-Time/Discrete-Time Cascaded ΣΔ Modulator , 2008, VLSIC 2008.

[15]  Francisco V. Fernández,et al.  High-Level Synthesis of Switched-Capacitor , Switched-Current and Continuous-Time Modulators Using SIMULINK-Based Time-Domain Behavioral Models , 2005 .

[16]  R. del Rio,et al.  An Adaptive ΣΔ modulator for multi-standard hand-held wireless devices , 2007, 2007 IEEE Asian Solid-State Circuits Conference.

[17]  Maurits Ortmanns,et al.  Continuous time sigma-delta A/D conversion : fundamentals, performance limits and robust implementations , 2006 .

[18]  Manuel Sanchez-Renedo,et al.  A 2-2 Discrete Time Cascaded ΣΔ Modulator With NTF Zero Using Interstage Feedback , 2006, 2006 13th IEEE International Conference on Electronics, Circuits and Systems.

[19]  Ngai Wong,et al.  Design of hybrid continuous-time discrete-time delta-sigma modulators , 2008, 2008 IEEE International Symposium on Circuits and Systems.

[20]  C. Lyden,et al.  A 0.18/spl mu/m 102dB-SNR mixed CT SC audio-band /spl Delta//spl Sigma/ ADC , 2005, ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005..

[21]  B.A. Wooley,et al.  A 77-dB Dynamic Range, 7.5-MHz Hybrid Continuous-Time/Discrete-Time Cascaded $\Sigma \Delta$ Modulator , 2008, IEEE Journal of Solid-State Circuits.

[22]  J.H. Huijsing,et al.  An IF-to-Baseband $\Sigma \Delta$ Modulator for AM/FM/IBOC Radio Receivers With a 118 dB Dynamic Range , 2007, IEEE Journal of Solid-State Circuits.

[23]  K. Baughan,et al.  Visions of 4G , 2000 .

[24]  Christos Politis,et al.  Cooperative networks for the future wireless world , 2004, IEEE Communications Magazine.

[25]  Ángel Rodríguez-Vázquez,et al.  High-level synthesis of switched-capacitor, switched-current and continuous-time /spl Sigma//spl Delta/ modulators using SIMULINK-based time-domain behavioral models , 2005, IEEE Transactions on Circuits and Systems I: Regular Papers.