Application Analysis with Integrated Identification of Complex Instructions for Configurable Processors
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[1] Miodrag Potkonjak,et al. MediaBench: a tool for evaluating and synthesizing multimedia and communications systems , 1997, Proceedings of 30th Annual International Symposium on Microarchitecture.
[2] Yoshinori Takeuchi,et al. PEAS-III: an ASIP design environment , 2000, Proceedings 2000 International Conference on Computer Design.
[3] Ricardo E. Gonzalez,et al. Xtensa: A Configurable and Extensible Processor , 2000, IEEE Micro.
[4] S. Kumar,et al. A benchmark suite for evaluating configurable computing systems—status, reflections, and future directions , 2000, FPGA '00.
[5] Sharad Malik,et al. Processor evaluation in an embedded systems design environment , 2000, VLSI Design 2000. Wireless and Digital Imaging in the Millennium. Proceedings of 13th International Conference on VLSI Design.
[6] Heinrich Meyr,et al. A novel methodology for the design of application-specificinstruction-set processors (ASIPs) using a machine description language , 2001, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..
[7] Scott A. Mahlke,et al. Automatic Design of Application Specific Instruction Set Extensions Through Dataflow Graph Exploration , 2004, International Journal of Parallel Programming.
[8] Gustavo de Veciana,et al. Design Challenges for New Application-Specific Processors , 2000, IEEE Des. Test Comput..
[9] Arun K. Somani,et al. Characterization of an Extended Multimedia Benchmark on a General Purpose Microprocessor Architecture , 2000 .
[10] Jan Rabaey,et al. Retargetable estimation scheme for DSP architecture selection , 2000, ASP-DAC '00.
[11] J. C. Ebergen. VLSI design , 1992, IEEE Des. Test Comput..
[12] Rainer Leupers,et al. An Executable Intermediate Representation for Retargetable Compilation and High-Level Code Optimization , 2003 .