Simulating modular microcomputers

Detailed logic design followed by breakboarding of microprocessor-based systems makes development costly. This paper reports on the use of a high-order language for designing simulation models of microcomputer functional elements ("macromodules") at the register level and for verifying the timing and interface requirements for a family of microcomputer configura tions. The definitions of these microcomputer macro modules (i.e., microprocessors, memories, and input/ output interface modules) was derived in previous system analyses and simulation work reported in References 1 through 5, which were sponsored by the Office of Naval Research. Of the several simulation or emulation methods avail able for studying the design of computer architecture, the technique adopted here provides the level of simulation required to verify timing, interface logic, and data flow within and between macromodules in the family for subsequent simulations of system performance. Furthermore, module-level simulation using discrete logic forms the necessary link between system design and the ultimate description of hardware for a low cost, step-by-step design process. Writing and executing the module simulation programs provides a disciplined approach to hardware design, since the components have to be modeled in detail to follow the flow of data and timing in a microcomputer. The modeling was done in a register-transfer language called Computer Design Language, which is very con venient for this kind of simulation model. Examples of programs in CDL are included.