Map channel decoding: Algorithm and VLSI architecture

The symbol by symbol MAP algorithm is parallelized leading to a purely feedforward block processing architecture for high speed soft output channel decoding. Using a novel algebraic formulation of the MAP algorithm, an algorithmic modification is discussed resulting a large decrease in complexity. A concatenated decoding system employing the soft output MAP algorithm compares favorably with parallel Viterbi decoders using a standard code, which is proved by a high speed system example.<<ETX>>

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