Design and evaluation of SiC multichip power module with low and symmetrical inductance

Compared to silicon devices, silicon carbide (SiC) devices have much lower Coss and Qg; they can switch at much higher speed, SiC power modules are thus more sensitive to stray parameters. Large stray inductance may result in high voltage spikes and cause severe electro-magnetic interference (EMI) issues; unbalanced stray inductance may contribute to uneven current sharing between parallel devices. Low and symmetrical inductance is a necessity to fully utilise the superior characteristics of SiC devices. This paper first studies the current sharing and voltage spike mechanisms of multichip power modules (MCPMs). Stray inductance distribution, current sharing as well as voltage spikes under different direct bonded copper (DBC) layout conditions are investigated using finite element modelling software. A round symmetrical DBC layout is then proposed. Compared with conventional ones, the proposed structure is symmetrical in stray inductance distribution; thus improving the consistency among chips. To reduce the total equivalent stray inductance and tackle the voltage spike problem, this study further presents an improved 3D structure on the basis of the round symmetrical DBC. The stray inductance extraction and double pulse simulation results verify the effectiveness of the improved 3D structure in current sharing as well as voltage spike reduction.