Using scanning probe microscopy and nanomoter surface profiler of DEKTAK for determination of thermal stress in quasi-monolithic integration technology (QMIT)

In this paper, application of scanning probe microscopy (SPM) and nanometer surface profiler of DEKTAK for determination of thermal stress in standard structure of QMIT is described. A three dimension finite element (3DFE) thermal stress simulator, a scanning probe microscopy measurements and nanometer surface profiler accompanied with a Peltier element (PE) have been used to determine the thermal stress distribution in the standard structure of QMIT. In this method by measuring and mapping the surface profile of Si-wafer around the embedded devices using SPM and DEKTAK the induced thermal stress is determined. Effects of different parameters such as baking temperature, power dissipation of the embedded GaAs-FET, geometry and elastic properties of thermal conductive epoxy have been described in details. Remarkable agreement between calculated and measured displacements created by thermal stress was found.