Symmetric Circuit Layout With Decoupled Modular Switching Cells for Multiparalleled SiC mosfets

Parallel connection of silicon carbide metal-oxide-semiconductor transistors are widely used in large-current-capacity applications or power modules. However, current imbalance caused by the tolerance of device parameters or asymmetric circuit layout is still a challenge for the reliability of the paralleled devices. The asymmetry of power circuit layout is inevitable when more than two devices are paralleled, which will lead to serious dynamic current imbalance. In this article, an equivalently symmetric power circuit layout based on decoupled paralleled modular switching cells (MSCs) is presented. The current sharing mechanisms of typical asymmetric power circuit layouts are first illustrated. The layout with distributed dc decoupling capacitors turns out to have the potential to modify the current paths but requires further optimization. Based on the mechanisms, the construction of the symmetric layout with the concept of MSC is elaborated by mathematical analysis. DC decoupling capacitors are used to decouple the paralleled symmetric MSCs. Thereafter, the key considerations for the decoupling capacitors are discussed. Experiments are finally carried out to validate the analysis. The test results show that the peak current imbalance is reduced to only 4.1% by the equivalently symmetric power circuit layout, which confirms the effect of decoupled MSCs method.

[1]  Cai Chen,et al.  A Dynamic Current Balancing Method for Paralleled SiC MOSFETs Using Monolithic Si-RC Snubber Based on a Dynamic Current Sharing Model , 2022, IEEE transactions on power electronics.

[2]  Y. Pei,et al.  Cu Clip-Bonding Method With Optimized Source Inductance for Current Balancing in Multichip SiC MOSFET Power Module , 2022, IEEE Transactions on Power Electronics.

[3]  Junming Zhang,et al.  An Active Gate Driver for Dynamic Current Sharing of Paralleled SiC MOSFETs , 2021, 2021 IEEE Energy Conversion Congress and Exposition (ECCE).

[4]  Junming Zhang,et al.  Analysis on Static Current Sharing of N-Paralleled Silicon Carbide MOSFETs , 2021, European Conference on Cognitive Ergonomics.

[5]  Laili Wang,et al.  A Method to Balance Dynamic Current of Paralleled SiC MOSFETs With Kelvin Connection Based on Response Surface Model and Nonlinear Optimization , 2021, IEEE Transactions on Power Electronics.

[6]  Yang Wen,et al.  Active Gate Driver for Improving Current Sharing Performance of Paralleled High-Power SiC MOSFET Modules , 2021, IEEE Transactions on Power Electronics.

[7]  S. Cui,et al.  Design of a Paralleled SiC MOSFET Half-Bridge Unit With Distributed Arrangement of DC Capacitors , 2020, IEEE Transactions on Power Electronics.

[8]  Laili Wang,et al.  Effect of Asymmetric Layout and Unequal Junction Temperature on Current Sharing of Paralleled SiC MOSFETs With Kelvin-Source Connection , 2020, IEEE Transactions on Power Electronics.

[9]  Zhibin Zhao,et al.  Chips Classification for Suppressing Transient Current Imbalance of Parallel-Connected Silicon Carbide MOSFETs , 2020, IEEE Transactions on Power Electronics.

[10]  Zhe Zhang,et al.  Imbalance Current Analysis and Its Suppression Methodology for Parallel SiC MOSFETs with Aid of a Differential Mode Choke , 2020, IEEE Transactions on Industrial Electronics.

[11]  Ralph M. Burkart,et al.  In-Depth Analysis of Static Current Sharing of Hard-Paralleled 1.7kV 700A SiC MOSFET LinPak Power Modules , 2019, 2019 20th International Symposium on Power Electronics (Ee).

[12]  F. Blaabjerg,et al.  Current Sharing Behavior of Parallel Connected Silicon Carbide MOSFETs Influenced by Parasitic Inductance , 2019, 2019 10th International Conference on Power Electronics and ECCE Asia (ICPE 2019 - ECCE Asia).

[13]  Zheng Zeng,et al.  Layout-Dominated Dynamic Current Imbalance in Multichip Power Module: Mechanism Modeling and Comparative Evaluation , 2019, IEEE Transactions on Power Electronics.

[14]  K. Ngo,et al.  Magnetic Integration Into a Silicon Carbide Power Module for Current Balancing , 2019, IEEE Transactions on Power Electronics.

[15]  A. Raciti,et al.  Effects of the Device Parameters and Circuit Mismatches on the Static and Dynamic Behavior of Parallel Connections of Silicon Carbide MOSFETs , 2018, 2018 IEEE Energy Conversion Congress and Exposition (ECCE).

[16]  Yu Chen,et al.  The Cost-Efficient Gating Drivers with Master-Slave Current Sharing Control for Parallel SiC MOSFETs , 2018, 2018 IEEE Transportation Electrification Conference and Expo, Asia-Pacific (ITEC Asia-Pacific).

[17]  Zhibin Zhao,et al.  New Screening Method for Improving Transient Current sharing of Paralleled SiC MOSFETs , 2018, 2018 International Power Electronics Conference (IPEC-Niigata 2018 -ECCE Asia).

[18]  Longya Xu,et al.  A Double-End Sourced Wire-Bonded Multichip SiC MOSFET Power Module With Improved Dynamic Current Sharing , 2017, IEEE Journal of Emerging and Selected Topics in Power Electronics.

[19]  Khai D. T. Ngo,et al.  Balancing of Peak Currents Between Paralleled SiC MOSFETs by Drive-Source Resistors and Coupled Power-Source Inductors , 2017, IEEE Transactions on Industrial Electronics.

[20]  Khai D. T. Ngo,et al.  Passive Balancing of Peak Currents Between Paralleled MOSFETs With Unequal Threshold Voltages , 2017, IEEE Transactions on Power Electronics.

[21]  Johann W. Kolar,et al.  All-SiC 9.5 kW/dm3 On-Board Power Electronics for 50 kW/85 kHz Automotive IPT System , 2017, IEEE Journal of Emerging and Selected Topics in Power Electronics.

[22]  Helong Li,et al.  Parallel Connection of Silicon Carbide MOSFETs for Multichip Power Modules , 2015 .

[23]  Philippe Godignon,et al.  A Survey of Wide Bandgap Power Semiconductor Devices , 2014, IEEE Transactions on Power Electronics.

[24]  Gangyao Wang,et al.  Dynamic and static behavior of packaged silicon carbide MOSFETs in paralleled applications , 2014, 2014 IEEE Applied Power Electronics Conference and Exposition - APEC 2014.

[25]  L. Tolbert,et al.  Active current balancing for parallel-connected silicon carbide MOSFETs , 2013, 2013 IEEE Energy Conversion Congress and Exposition.

[26]  Jianpeng Wang,et al.  Interleaved Planar Packaging Method of Multichip SiC Power Module for Thermal and Electrical Performance Improvement , 2022, IEEE Transactions on Power Electronics.

[27]  Xiongfei Wang,et al.  Influences of Device and Circuit Mismatches on Paralleling Silicon Carbide MOSFETs , 2016, IEEE Transactions on Power Electronics.