Performance of Satellite Digital Transparent Processors Through Equivalent Noise

This paper presents a novel analysis and design of satellite digital transparent processors. An equivalent noise model is developed and validated to characterize the nonideal behaviours in all stages of a digital on-board processor, and the typical link-budget approach is extended to incorporate the related noise contributions. The theoretical framework is then exploited to support an explicit design procedure that relates typical link-budget performance indices to the final HW specifications of every single processing block.

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