Algorithms and pipeline architectures for 2-D FFT and FFT-like transforms

In this paper, efficient pipeline architectures that implement the 2-D FFT are presented. Based on the Vector Radix approach, the new structures alleviate the use of memory banks and the transposition of data of the row-column technique. Architectures for Vector Radix 2x2 algorithm and for a modified Vector Radix 4x4, called Vector Radix 2^2x2^2 algorithm, which has been devised and constructed from Vector Radix 2x2, are presented. These architectures can also be built from their 1-D counterparts. Thus, generic and parameterised architectures can be described using a hardware description language to implement both 1-D and 2-D FFTs. A comparison with row-column FFT architectures has shown that the proposed architectures can achieve a 50% reduction in complex multipliers usage. Furthermore, the suggested architectures are suitable to implement FFT-like transforms if the right type of arithmetic components is selected. In particular, they can be modified in order to implement Number Theoretic Transforms. In this case, a saving of up to 66% of registers and 50% of adders requirements of similar work in the literature can be achieved.