An area efficient body contact for low and high voltage SOI MOSFET devices

Abstract A simple and high-performance area efficient body-tied-source (BTS) contact for SOI MOSFET is presented. By simple modification to the physical layout and without introducing any increase to the fabrication process steps, the proposed body contact can be implemented. Three-dimensional (3D) non-isothermal simulation on SOI CMOS devices showed higher current drive while floating body effects were completely suppressed. In addition, improved performance is achieved when comparing on-resistance ( R ON ) and breakdown voltage ( V BR ) with the conventional BTS structures. The new body contact structure is applicable to both low and high voltage (planar or trench) SOI and bulk devices. Experimental results obtained from fabricated bulk MOSFET devices utilizing the proposed body contact structure agreed well with the simulation findings.

[1]  M. Horiuchi,et al.  BESS: a source structure that fully suppresses the floating body effects in SOI CMOSFETs , 1996, International Electron Devices Meeting. Technical Digest.

[2]  M. Osman,et al.  Small signal analysis of a SOI MOSFET device with a novel area efficient body contact , 2005, Proceedings. IEEE SoutheastCon, 2005..

[3]  Jong-Wook Lee,et al.  Performance improvements in high-density DRAM application using 0.15 /spl mu/m body-contacted SOI technology , 2000, 2000 IEEE International SOI Conference. Proceedings (Cat. No.00CH37125).

[4]  Krishna Shenai,et al.  Scaling constraints imposed by self-heating in submicron SOI MOSFET's , 1995 .

[5]  S. C. Kuehne,et al.  SOI MOSFET with buried body strap by wafer bonding , 1998 .

[6]  J. Colinge.  Silicon-on-Insulator Technology: Materials to VLSI , 1991 .

[7]  G. G. Shahidi.  SOI technology for the GHz era , 2002, IBM J. Res. Dev..

[8]  M. Yoshimi,et al.  Suppression of the floating-body effect in partially-depleted SOI MOSFETs with SiGe source structure and its mechanism , 1997 .

[9]  S. Ito,et al.  Suppression of leakage current in SOI CMOS LSIs by using silicon-sidewall body-contact (SSBC) technology , 2002, 2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303).

[10]  Mohamed A. Osman,et al.  Two-dimensional model for investigating body contact structures in PD SOI MOSFETs , 2003 .

[11]  Zia Hossain,et al.  Design and optimization of double-RESURF high-voltage lateral devices for a manufacturable process , 2003 .