A 0.52 ppm/°C high-order temperature-compensated voltage reference

This paper proposed a new high-order curvature compensation technique for a new bandgap voltage reference structure using the temperature characteristics of current gain β and emitter bandgap narrowing factor ΔEG of a lateral NPN bipolar transistor. The new structure can produce two voltage references, which are 1.209 and 2.418 V, respectively. The simulation results show that the temperature coefficients of the two output voltage are 0.52 ppm/°C, the PSRR is more than 60 dB for frequencies at 10 kHz, and the circuit dissipates 0.18 mW with 5-V supply.

[1]  F. A. Lindholm,et al.  Incorporation of the early effect in the Ebers-Moll model , 1971 .

[2]  H. Lanyon,et al.  Bandgap narrowing in heavily doped silicon , 1978, 1978 International Electron Devices Meeting.

[3]  Richard C. Jaeger,et al.  Self consistent bipolar transistor models for computer simulation , 1978 .

[4]  R. Jaeger,et al.  The temperature dependence of the amplification factor of bipolar-junction transistors , 1987, IEEE Transactions on Electron Devices.

[5]  Gyudong Kim,et al.  Exponential curvature-compensated BiCMOS bandgap references , 1994, IEEE J. Solid State Circuits.

[6]  Gabriel A. Rincon-Mora,et al.  A 1.1-V current-mode and piecewise-linear curvature-corrected bandgap reference , 1998, IEEE J. Solid State Circuits.

[7]  Gabriel A. Rincon-Mora,et al.  Voltage References: From Diodes to Precision High-Order Bandgap Circuits , 2001 .

[8]  K. Leung,et al.  A sub-1-V 15-ppm/°C CMOS bandgap voltage reference without requiring low threshold voltage device , 2002, IEEE J. Solid State Circuits.

[9]  Ka Nang Leung,et al.  Design of a 1.5-V high-order curvature-compensated CMOS bandgap reference , 2004, 2004 IEEE International Symposium on Circuits and Systems (IEEE Cat. No.04CH37512).

[10]  C. Popa CMOS logarithmic curvature-corrected voltage reference using a multiple differential structure , 2005, International Symposium on Signals, Circuits and Systems, 2005. ISSCS 2005..

[11]  B.K. Ahuja,et al.  A very high precision 500-nA CMOS floating-gate analog voltage reference , 2005, IEEE Journal of Solid-State Circuits.