Realization of wireless multimedia communication systems on reconfigurable platforms

Wireless multimedia communication systems become increasingly more computational intensive and demand for higher flexibility. The realization of these systems on reconfigurable hardware offers a good balance for these requirements. In this paper the suitability of commercially available reconfigurable hardware platforms for the target application domain is evaluated. Based on this evaluation a heterogeneous partly reconfigurable system-on-chip platform is identified as ideal implementation platform for the targeted systems. Systems from different target domains are analysed and different cases where the inclusion of reconfigurable hardware in their realizations would lead to improved quality in terms of implementation efficiency and flexibility are identified, Design methodology requirements for the realization of systems from the target application domain on the targeted platform are analysed and issues not covered by existing methodologies are identified. The principles of a methodology handling these open issues are described. Results from the prototyping of different systems are also presented and show the potentials of a reconfigurable hardware platform, which in the future will lead to reduced costs and increased flexibility of the wireless multimedia communication systems.

[1]  Sharad Malik,et al.  Instruction level power analysis and optimization of software , 1996, J. VLSI Signal Process..

[2]  Rudy Lauwereins,et al.  Enabling hardware-software multitasking on a reconfigurable computing platform for networked portable multimedia appliances , 2002 .

[3]  Cristina Silvano,et al.  Power estimation of embedded systems: a hardware/software codesign approach , 1998, IEEE Trans. Very Large Scale Integr. Syst..

[4]  Jürgen Becker,et al.  DReAM: A Dynamically Reconfigurable Architecture for Future Mobile Communications Applications , 2000, FPL.

[5]  Fadi J. Kurdahi,et al.  A framework for reconfigurable computing: task scheduling and context management , 2001, IEEE Trans. Very Large Scale Integr. Syst..

[6]  R. Engelbrecht,et al.  DIGEST of TECHNICAL PAPERS , 1959 .

[7]  Ieee . Wg Part11 : Wireless LAN Medium Access Control (MAC) and Physical Layer (PHY) specifications, High-speed physical Layer in the 5 GHz Band , 1999 .

[8]  Patrick Schaumont,et al.  Hardware/software partitioning of embedded system in OCAPI-xl , 2001, Ninth International Symposium on Hardware/Software Codesign. CODES 2001 (IEEE Cat. No.01TH8571).

[9]  Kostas Masselos,et al.  System-level modeling of dynamically reconfigurable hardware with SystemC , 2003, Proceedings International Parallel and Distributed Processing Symposium.

[10]  H. Zhang,et al.  A 1-V heterogeneous reconfigurable DSP IC for wireless baseband digital signal processing , 2000, IEEE Journal of Solid-State Circuits.

[11]  John Wawrzynek,et al.  Reconfigurable computing: what, why, and implications for design automation , 1999, DAC '99.