A harmonic rejection mixer robust to RF device mismatches

Harmonic rejection (HR) mixers are key building blocks in wideband receivers such as TV tuners and software-defined radio receivers employing low-IF or direct downconversion. In TV tuners, in-band HR in excess of 72dB is desired. A mixer capable of high harmonic-rejection ratio (HRR) is needed to relax the requirements on pre-mixer RF filters, which are expensive and bulky. HRR for conventional HR mixers [1] is limited by mismatches amongst devices operating at RF frequencies (shown in Fig. 3.8.1). Reducing mismatches by increasing device area to achieve high HRR comes at a severe cost of power, area and RF bandwidth. This matching requirement at RF frequencies limits the achievable HRR to be only between 30 and 40dB [2,3]. Recently, two-stage HR mixers have been proposed [4]. While [4] has reduced gain errors, phase errors that limit the achievable HRR are still determined by device matching at RF frequencies.

[1]  Eric A. M. Klumperink,et al.  A software-defined radio receiver architecture robust to out-of-band interference , 2009, 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.

[2]  A.A. Abidi,et al.  Noise in RF-CMOS mixers: a simple physical model , 2000, IEEE Journal of Solid-State Circuits.

[3]  Li Lin,et al.  A 1.75 GHz highly-integrated narrow-band CMOS transmitter with harmonic-rejection mixers , 2001, 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177).

[4]  Rahim Bagheri,et al.  An 800MHz to 5GHz Software-Defined Radio Receiver in 90nm CMOS , 2006, 2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers.

[5]  Eric A. M. Klumperink,et al.  A Discrete-Time Mixing Receiver Architecture with Wideband Harmonic Rejection , 2008, 2008 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.