Demonstration of improved heteroepitaxy, scaled gate stack and reduced interface states enabling heterojunction tunnel FETs with high drive current and high on-off ratio
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S. Datta | J. M. Fastenau | V. Narayanan | R. Bijesh | J. Suehle | M. K. Hudait | D. Loubychev | D. K. Mohata | D. Gundlach | Y. Zhu | R. Southwick | Z. Chbili | A. K. Liu | T. S. Mayer