Applying River Formation Dynamics to Analyze VLSI Power Grid Networks

One of the major concerns in today's CMOS VLSI design is reliable on-chip power delivery. As semiconductor technology continues to scale down day-by-day, different process variabilities in silicon keep on manifest themselves affecting the chip performance. One of the critical process induced variations come from worst-case voltage fluctuations (hotspots) across power rails of a chip. These fluctuations have become more significant with increase in size of power grid networks. Thus, it is necessary to locate the hotspots accurately throughout the power grid network for efficient design verification by using suitable computing environment and a correct methodology. In this paper, a heuristic based on parallel river formation dynamics (RFD) scheme is proposed to analyze large power grid networks on graphics processing unit (GPU). Here the concept of RFD to pursue a path using gradient orientation is applied to identify hotspots across the power grid network. Experimental results show that RFD accelerates the analysis by efficiently exploiting the structure of power grid network on GPU to achieve remarkable speedups with acceptable accuracy loss.