Transforming binary code for low-power embedded processors
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[1] Massoud Pedram,et al. Irredundant address bus encoding for low power , 2001, ISLPED '01.
[2] Luca Benini,et al. Asymptotic zero-transition activity encoding for address busses in low-power microprocessor-based systems , 1997, Proceedings Great Lakes Symposium on VLSI.
[3] Anantha P. Chandrakasan,et al. Low power bus coding techniques considering inter-wire capacitances , 2000, Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044).
[4] Mircea R. Stan,et al. Bus-invert coding for low-power I/O , 1995, IEEE Trans. Very Large Scale Integr. Syst..
[5] Miodrag Potkonjak,et al. MediaBench: a tool for evaluating and synthesizing multimedia and communications systems , 1997, Proceedings of 30th Annual International Symposium on Microarchitecture.
[6] Kevin Skadron,et al. Odd/even bus invert with two-phase transfer for buses with coupling , 2002, ISLPED '02.
[7] Naresh R. Shanbhag,et al. A coding framework for low-power address and data busses , 1999, IEEE Trans. Very Large Scale Integr. Syst..
[8] Todd M. Austin,et al. SimpleScalar: An Infrastructure for Computer System Modeling , 2002, Computer.
[9] Ibrahim N. Hajj,et al. Using dynamic cache management techniques to reduce energy in a high-performance processor , 1999, Proceedings. 1999 International Symposium on Low Power Electronics and Design (Cat. No.99TH8477).