Dynamic Partial based Single Event Upset (SEU) Injection Platform on FPGA
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[1] B.L. Bhuva,et al. Comparison of Dual-Rail and TMR Logic Cost Effectiveness and Suitability for FPGAs With Reconfigurable SEU Tolerance , 2009, IEEE Transactions on Nuclear Science.
[2] Charles E. Stroud,et al. Embedded Processor Based Fault Injection and SEU Emulation for FPGAs , 2009, ESA.
[3] Marco Furini,et al. International Journal of Computer and Applications , 2010 .
[4] Carl Carmichael. Virtex FPGA series configuration and readback , 1999 .
[5] F. Novak,et al. SEU Recovery Mechanism for SRAM-Based FPGAs , 2012, IEEE Transactions on Nuclear Science.
[6] Karim Mohammadi,et al. Designing and implementing a reliable thermal monitoring system based on the 1-wire protocol on FPGA for a LEO satellite , 2015 .
[7] David de Andrés,et al. Run-Time Reconfiguration for Emulating Transient Faults in VLSI Systems , 2006, International Conference on Dependable Systems and Networks (DSN'06).
[8] Martin Straka,et al. Fault tolerant system design and SEU injection based testing , 2013, Microprocess. Microsystems.
[9] Hans G. Kerkhoff,et al. Rapid transient fault insertion in large digital systems , 2013, Microprocess. Microsystems.
[10] Raoul Velazco,et al. Reliability Limits of TMR Implemented in a SRAM-based FPGA: Heavy Ion Measures vs. Fault Injection Predictions , 2010, 2010 11th Latin American Test Workshop.
[11] Régis Leveugle,et al. Using run-time reconfiguration for fault injection applications , 2003, IEEE Trans. Instrum. Meas..
[12] Martin Radetzki,et al. Concurrent and comparative fault simulation in SystemC and its application in robustness evaluation , 2013, Microprocessors and microsystems.
[13] C. Lopez-Ongil,et al. Autonomous Fault Emulation: A New FPGA-Based Acceleration System for Hardness Evaluation , 2007, IEEE Transactions on Nuclear Science.
[14] Heinrich Theodor Vierhaus,et al. Simulated fault injections and their acceleration in SystemC , 2008, Microprocess. Microsystems.
[15] P Reviriego,et al. Increasing Reliability of FPGA-Based Adaptive Equalizers in the Presence of Single Event Upsets , 2011, IEEE Transactions on Nuclear Science.
[16] Dhiraj K. Pradhan,et al. Fault Injection: A Method for Validating Computer-System Dependability , 1995, Computer.
[17] Seyed Ghassem Miremadi,et al. SCFIT: A FPGA-based fault injection technique for SEU fault model , 2012, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE).