Preprocessing techniques for first-order clausification
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[1] Andrei Voronkov,et al. Invariant Generation in Vampire , 2011, TACAS.
[2] Nachum Dershowitz,et al. In handbook of automated reasoning , 2001 .
[3] Zurab Khasidashvili,et al. Verifying equivalence of memories using a first order logic theorem prover , 2009, 2009 Formal Methods in Computer-Aided Design.
[4] Jean Goubault-Larrecq,et al. Normal Form Transformations , 2001, Handbook of Automated Reasoning.
[5] Armin Biere,et al. Local Two-Level And-Inverter Graph Minimization without Blowup , 2006 .
[6] Christoph Weidenbach,et al. Computing Small Clause Normal Forms , 2001, Handbook of Automated Reasoning.
[7] Andrei Voronkov,et al. Encoding industrial hardware verification problems into effectively propositional logic , 2010, Formal Methods in Computer Aided Design.
[8] Per Bjesse,et al. DAG-aware circuit compression for formal verification , 2004, IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004..
[9] Enrico Giunchiglia,et al. sQueezeBF: An Effective Preprocessor for QBFs Based on Equivalence Reasoning , 2010, SAT.
[10] Andrei Voronkov,et al. EPR-Based Bounded Model Checking at Word Level , 2012, IJCAR.
[11] Andreas Kuehlmann. Dynamic transition relation simplification for bounded property checking , 2004, IEEE/ACM International Conference on Computer Aided Design, 2004. ICCAD-2004..
[12] Alessandro Armando,et al. ASASP: Automated Symbolic Analysis of Security Policies , 2011, CADE.
[13] Youssef Hamadi,et al. Efficiently solving quantified bit-vector formulas , 2010, Formal Methods in Computer Aided Design.
[14] Geoff Sutcliffe. The 5th IJCAR automated theorem proving system competition - CASC-J5 , 2011, AI Commun..
[15] Andreas Kuehlmann,et al. Equivalence checking using cuts and heaps , 1997, DAC.
[16] Daniel Brand. Verification of large synthesized designs , 1993, ICCAD.
[17] Zurab Khasidashvili,et al. Implicative Simultaneous Satisfiability and Applications , 2011, Haifa Verification Conference.
[18] Konstantin Korovin,et al. iProver - An Instantiation-Based Theorem Prover for First-Order Logic (System Description) , 2008, IJCAR.
[19] Nikolaj Bjørner,et al. Z3: An Efficient SMT Solver , 2008, TACAS.
[20] Armin Biere,et al. Symbolic Model Checking without BDDs , 1999, TACAS.
[21] Andrei Voronkov,et al. Encodings of Bounded LTL Model Checking in Effectively Propositional Logic , 2007, CADE.