High-speed and highly accurate evaluation of electrical characteristics in MOSFETs

Threshold voltage variability, random telegraph signal, and leakage current of gate oxides and pn junctions of numerous MOSFETs are evaluated by the array test circuits. By converting from current signal of MOSFETs to the voltage signal in the test circuit, accurate and high speed measurement can be obtained. These numerous data of variability, noise, and leakage current caused by the defects in MOSFETs are very useful for the process development and constructing the device structures.

[1]  A. Hiraiwa,et al.  Statistical modeling of dynamic random access memory data retention characteristics , 1996 .

[2]  G. Declerck.  A look into the future of nanoelectronics , 2005, Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005..

[3]  R. Kuroda,et al.  The study of time constant analysis in random telegraph noise at the subthreshold voltage region , 2013, 2013 IEEE International Reliability Physics Symposium (IRPS).

[4]  H. Hazama,et al.  Non-uniform current flow through thin oxide after Fowler-Nordheim current stress , 1996, Proceedings of International Reliability Physics Symposium.

[5]  Shih-Wei Sun,et al.  Limitation of CMOS supply-voltage scaling by MOSFET threshold-voltage variation , 1994, Proceedings of IEEE Custom Integrated Circuits Conference - CICC '94.

[6]  Tadahiro Ohmi,et al.  A Test Circuit for Extremely Low Gate Leakage Current Measurement of 10 aA for 80 000 MOSFETs in 80 s , 2013 .

[7]  Tadahiro Ohmi,et al.  Statistical Analysis of RTS Noise and Low Frequency Noise in 1M MOSFETs Using an Advanced TEG , 2007 .

[8]  M. J. Kirton,et al.  Noise in solid-state microstructures: A new perspective on individual defects, interface states and low-frequency (1/ƒ) noise , 1989 .

[9]  G. Atwood,et al.  Erratic Erase In ETOX/sup TM/ Flash Memory Array , 1993, Symposium 1993 on VLSI Technology.

[10]  T. Hamamoto,et al.  On the retention time distribution of dynamic random access memory (DRAM) , 1998 .

[11]  K. Steinhubl.  Design of Ion-Implanted MOSFET'S with Very Small Physical Dimensions , 1974 .

[12]  Andrew R. Brown,et al.  RTS amplitudes in decananometer MOSFETs: 3-D simulation study , 2003 .

[13]  R. Kuroda,et al.  Demonstrating distribution of SILC values at individual leakage spots , 2013, 2013 IEEE International Reliability Physics Symposium (IRPS).

[14]  K. Yamaguchi.  Theoretical study of deep-trap-assisted anomalous currents in worst-bit cells of dynamic random-access memories (DRAM's) , 2000 .

[15]  R. Kuroda,et al.  A Test Circuit for Statistical Evaluation of $p-n$ Junction Leakage Current and its Noise , 2012, IEEE Transactions on Semiconductor Manufacturing.

[16]  A. Theuwissen,et al.  Leakage current modeling of test structures for characterization of dark current in CMOS image sensors , 2003 .

[17]  A. Teramoto,et al.  A Simple Test Structure for Evaluating the Variability in Key Characteristics of a Large Number of MOSFETs , 2012, IEEE Transactions on Semiconductor Manufacturing.

[18]  Tadahiro Ohmi,et al.  Very Low Bit Error Rate in Flash Memory using Tunnel Dielectrics formed by Kr/O2/NO Plasma Oxynitridation , 2006 .

[19]  Tadahiro Ohmi,et al.  New Statistical Evaluation Method for the Variation of Metal–Oxide–Semiconductor Field-Effect Transistors , 2007 .

[20]  K. Takeuchi,et al.  Analyses of 5σ Vth fluctuation in 65nm-MOSFETs using takeuchi plot , 2008, 2008 Symposium on VLSI Technology.

[21]  S. Sugawa,et al.  Random Telegraph Signal Statistical Analysis using a Very Large-scale Array TEG with 1M MOSFETs , 2007, 2007 IEEE Symposium on VLSI Technology.

[22]  K. R. Lakshmikumar,et al.  Characterisation and modeling of mismatch in MOS transistors for precision analog design , 1986 .

[23]  Tadahiro Ohmi,et al.  Large-Scale Test Circuits for High-Speed and Highly Accurate Evaluation of Variability and Noise in Metal–Oxide–Semiconductor Field-Effect Transistor Electrical Characteristics , 2011 .

[24]  S. Sugawa,et al.  Statistical evaluation for trap energy level of RTS characteristics , 2010, 2010 Symposium on VLSI Technology.

[25]  A. Theuwissen,et al.  Random Telegraph Signal in CMOS Image Sensor Pixels , 2006, 2006 International Electron Devices Meeting.

[26]  Tadahiro Ohmi,et al.  Statistical Evaluation of Process Damage Using an Arrayed Test Pattern in a Large Number of MOSFETs , 2010, IEEE Transactions on Electron Devices.

[27]  G.E. Moore,et al.  Cramming More Components Onto Integrated Circuits , 1998, Proceedings of the IEEE.