A novel technique for eliminating iterative based computation of polarity of micro-rotations in CORDIC based sine-cosine generators

Abstract The CORDIC algorithm has been readily used to decimate trigonometric and hyperbolic functions with simple shift and add operations. Despite further refinements in terms of circuit latency and performance of the algorithm with the introduction of redundant arithmetic and higher radix CORDIC techniques, the iterative nature remains to be the major bottleneck for further optimisation. In this paper, a novel approach for the pre-computation of the polarity of micro-rotations has been proposed to eliminate the iterative process during sine/cosine computations. This approach to determine the signed digits lends well towards realising high-speed sine/cosine functions. It relies on a new technique, called Split Decomposition Algorithm, devised for the VLSI efficient implementation of the pre-computation of the polarity of micro-rotations. A ROM less architecture for the pre-computation of the polarity of micro-rotations has been devised with the help of a new algorithm that exploits certain properties of the signed digits. The architectures for 24-bit and 32-bit versions were implemented using VHDL and extensive simulations have been performed to validate the results. The functionally simulated net list has been synthesised with 0.35μ technology library and the area-time measures are provided.