Circuit for limiting the signal slew rate output signals of integrated circuits

The invention relates to a circuit for limiting the rate of increase in the signal level of output signals of integrated circuits. According to the invention, the circuit is integrated into the integrated circuit; a reference signal is generated in the circuit and the output signal then controlled. The rate of increase in the signal level of the output signal is determined by a differential element (DDT1, DDT2) and used to derive a correction signal for controlling the output signal.