Thermal-Aware Scheduling for Peak Temperature Reduction with Stochastic Workloads

In this paper we proposed a thermal-aware scheduling algorithm for peak temperature reduction with stochastic workloads. The proposed approach consists of two steps. The first step constructs a job sequence based on the mean of the execution time of each job; and the constructed job sequence interleaves the execution of hot jobs and cool jobs. The hot job pushes up the chip temperature while the cool one cools down the chip. Accordingly the chip reduces the peak temperature. The second step exploits the job slack to cancel out the adverse thermal impact due to the uncertainty of the job execution time. The slacks are allocated among the hot jobs. Hot jobs whose execution time deviates more above the average execution time will get more slack, vice versa. Experimental results show that the proposed approach effectively avoids the thermal emergency for the applications with stochastic workloads by achieving the peak temperature reduction of 4.7C on average.

[1]  Kirk Pruhs,et al.  Speed Scaling to Manage Temperature , 2005, STACS.

[2]  Alan Jay Smith,et al.  Improving dynamic voltage scaling algorithms with PACE , 2001, SIGMETRICS '01.

[3]  Karam S. Chatha,et al.  Approximation algorithm for the temperature-aware scheduling problem , 2007, 2007 IEEE/ACM International Conference on Computer-Aided Design.

[4]  Qing Wu,et al.  Thermal-aware job allocation and scheduling for three dimensional chip multiprocessor , 2010, 2010 11th International Symposium on Quality Electronic Design (ISQED).

[5]  Li Shang,et al.  Thermal vs Energy Optimization for DVFS-Enabled Processors in Embedded Systems , 2007, 8th International Symposium on Quality Electronic Design (ISQED'07).

[6]  Tulika Mitra,et al.  Temperature aware task sequencing and voltage scaling , 2008, 2008 IEEE/ACM International Conference on Computer-Aided Design.

[7]  Intel® XScale® Micro-Architecture , 2006, Encyclopedia of Multimedia.

[8]  Karam S. Chatha,et al.  System-level thermal aware design of applications with uncertain execution time , 2008, 2008 IEEE/ACM International Conference on Computer-Aided Design.

[9]  Qing Wu,et al.  A probabilistic technique for full-chip leakage estimation , 2008, Proceeding of the 13th international symposium on Low power electronics and design (ISLPED '08).

[10]  Qing Wu,et al.  Full-chip leakage current estimation based on statistical sampling techniques , 2008, GLSVLSI '08.

[11]  Stephen H. Gunther,et al.  Managing the Impact of Increasing Microprocessor Power Consumption , 2001 .